Searched refs:memoryClock (Results 1 – 13 of 13) sorted by relevance
214 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_powerplay_table_information()231 && hwmgr->platform_descriptor.overdriveLimit.memoryClock > 0) in init_powerplay_table_information()
345 …od_table[2]->entries[i].clk = hwmgr->platform_descriptor.overdriveLimit.memoryClock > od_table[2]-… in vega10_odn_initial_default_setting()346 hwmgr->platform_descriptor.overdriveLimit.memoryClock : in vega10_odn_initial_default_setting()914 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in vega10_hwmgr_backend_init()1359 if (hwmgr->platform_descriptor.overdriveLimit.memoryClock == 0) in vega10_setup_default_dpm_tables()1360 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in vega10_setup_default_dpm_tables()1760 hwmgr->platform_descriptor.overdriveLimit.memoryClock; in vega10_populate_single_memory_level()3180 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega10_apply_state_adjust_rules()3211 minimum_clocks.memoryClock = stable_pstate_mclk; in vega10_apply_state_adjust_rules()3236 if (mclk < minimum_clocks.memoryClock) in vega10_apply_state_adjust_rules()3237 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in vega10_apply_state_adjust_rules()[all …]
814 if (hwmgr->platform_descriptor.overdriveLimit.memoryClock == 0) in smu7_setup_dpm_tables_v1()815 hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()2589 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in smu7_hwmgr_backend_init()2925 minimum_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in smu7_apply_state_adjust_rules()2948 minimum_clocks.memoryClock = stable_pstate_mclk; in smu7_apply_state_adjust_rules()2975 if (mclk < minimum_clocks.memoryClock) in smu7_apply_state_adjust_rules()2976 mclk = (minimum_clocks.memoryClock > max_limits->mclk) ? in smu7_apply_state_adjust_rules()2977 max_limits->mclk : minimum_clocks.memoryClock; in smu7_apply_state_adjust_rules()4526 hwmgr->platform_descriptor.overdriveLimit.memoryClock/100); in smu7_print_clock_levels()4832 hwmgr->platform_descriptor.overdriveLimit.memoryClock < clk) { in smu7_check_clk_voltage_valid()[all …]
997 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_overdrive_limits_V1_4()1033 hwmgr->platform_descriptor.overdriveLimit.memoryClock = le32_to_cpu(header->ulMaxMemoryClock); in init_overdrive_limits_V2_1()1053 hwmgr->platform_descriptor.overdriveLimit.memoryClock = 0; in init_overdrive_limits()
1053 clocks.memoryClock = hwmgr->display_config->min_mem_set_clock != 0 ? in smu8_apply_state_adjust_rules()1059 clocks.memoryClock = hwmgr->dyn_state.max_clock_voltage_on_ac.mclk; in smu8_apply_state_adjust_rules()1061 force_high = (clocks.memoryClock > data->sys_info.nbp_memory_clock[SMU8_NUM_NBPMEMORYCLOCK - 1]) in smu8_apply_state_adjust_rules()
530 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in smu10_hwmgr_backend_init()
866 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_over_drive_limits()
423 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in vega12_hwmgr_backend_init()1488 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega12_notify_smc_display_config_after_ps_adjustment()
465 hwmgr->platform_descriptor.clockStep.memoryClock = 500; in vega20_hwmgr_backend_init()2302 min_clocks.memoryClock = hwmgr->display_config->min_mem_set_clock; in vega20_notify_smc_display_config_after_ps_adjustment()2320 dpm_table->dpm_state.hard_min_level = min_clocks.memoryClock / 100; in vega20_notify_smc_display_config_after_ps_adjustment()
332 hwmgr->platform_descriptor.overdriveLimit.memoryClock = in init_over_drive_limits()
328 uint32_t memoryClock; member
718 unsigned int memoryClock; member
2482 info->memoryClock = (unsigned int)state->bw_ctx.bw.dcn.clk.dramclk_khz; in get_clock_requirements_for_state()
