Home
last modified time | relevance | path

Searched refs:mem_level (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dvegam_smumgr.c961 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_calculate_mclk_params() argument
970 mem_level->MclkFrequency = (uint32_t)mpll_param.ulClock; in vegam_calculate_mclk_params()
971 mem_level->Fcw_int = (uint16_t)mpll_param.ulMclk_fcw_int; in vegam_calculate_mclk_params()
972 mem_level->Fcw_frac = (uint16_t)mpll_param.ulMclk_fcw_frac; in vegam_calculate_mclk_params()
973 mem_level->Postdiv = (uint8_t)mpll_param.ulPostDiv; in vegam_calculate_mclk_params()
979 uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) in vegam_populate_single_memory_level() argument
991 &mem_level->MinVoltage, &mem_level->MinMvdd); in vegam_populate_single_memory_level()
997 result = vegam_calculate_mclk_params(hwmgr, clock, mem_level); in vegam_populate_single_memory_level()
1002 mem_level->EnabledForThrottle = 1; in vegam_populate_single_memory_level()
1003 mem_level->EnabledForActivity = 0; in vegam_populate_single_memory_level()
[all …]
Dfiji_smumgr.c1166 uint32_t clock, struct SMU73_Discrete_MemoryLevel *mem_level) in fiji_populate_single_memory_level() argument
1183 (uint32_t *)(&mem_level->MinVoltage), &mem_level->MinMvdd); in fiji_populate_single_memory_level()
1189 mem_level->EnabledForThrottle = 1; in fiji_populate_single_memory_level()
1190 mem_level->EnabledForActivity = 0; in fiji_populate_single_memory_level()
1191 mem_level->UpHyst = data->current_profile_setting.mclk_up_hyst; in fiji_populate_single_memory_level()
1192 mem_level->DownHyst = data->current_profile_setting.mclk_down_hyst; in fiji_populate_single_memory_level()
1193 mem_level->VoltageDownHyst = 0; in fiji_populate_single_memory_level()
1194 mem_level->ActivityLevel = data->current_profile_setting.mclk_activity; in fiji_populate_single_memory_level()
1195 mem_level->StutterEnable = false; in fiji_populate_single_memory_level()
1197 mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW; in fiji_populate_single_memory_level()
[all …]
Dpolaris10_smumgr.c1072 uint32_t clock, struct SMU74_Discrete_MemoryLevel *mem_level) in polaris10_populate_single_memory_level() argument
1090 &mem_level->MinVoltage, &mem_level->MinMvdd); in polaris10_populate_single_memory_level()
1096 mem_level->MclkFrequency = clock; in polaris10_populate_single_memory_level()
1097 mem_level->EnabledForThrottle = 1; in polaris10_populate_single_memory_level()
1098 mem_level->EnabledForActivity = 0; in polaris10_populate_single_memory_level()
1099 mem_level->UpHyst = data->current_profile_setting.mclk_up_hyst; in polaris10_populate_single_memory_level()
1100 mem_level->DownHyst = data->current_profile_setting.mclk_down_hyst; in polaris10_populate_single_memory_level()
1101 mem_level->VoltageDownHyst = 0; in polaris10_populate_single_memory_level()
1102 mem_level->ActivityLevel = data->current_profile_setting.mclk_activity; in polaris10_populate_single_memory_level()
1103 mem_level->StutterEnable = false; in polaris10_populate_single_memory_level()
[all …]