Searched refs:mec_hdr (Results 1 – 4 of 4) sorted by relevance
1059 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local1084 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()1087 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()1088 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()1090 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()2895 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local2906 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()2907 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()2911 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()2949 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]
1731 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local1755 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()1759 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()1760 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_mec_init()1762 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()3289 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local3299 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()3300 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()3304 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()3317 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
2725 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local2732 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode()2733 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode()2734 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode()2736 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode()2743 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode()2744 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
4270 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4275 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4279 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4280 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4284 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
