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Searched refs:mc_reg_address (Results 1 – 23 of 23) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/radeon/
Dcypress_dpm.c957 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s0); in cypress_populate_mc_reg_addresses()
959 cpu_to_be16(eg_pi->mc_reg_table.mc_reg_address[j].s1); in cypress_populate_mc_reg_addresses()
972 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_RAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
973 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_RAS_TIMING >> 2; in cypress_set_mc_reg_address_table()
976 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_CAS_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
977 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_CAS_TIMING >> 2; in cypress_set_mc_reg_address_table()
980 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING_LP >> 2; in cypress_set_mc_reg_address_table()
981 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC_TIMING >> 2; in cypress_set_mc_reg_address_table()
984 eg_pi->mc_reg_table.mc_reg_address[i].s0 = MC_SEQ_MISC_TIMING2_LP >> 2; in cypress_set_mc_reg_address_table()
985 eg_pi->mc_reg_table.mc_reg_address[i].s1 = MC_SEQ_MISC_TIMING2 >> 2; in cypress_set_mc_reg_address_table()
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Dbtc_dpm.c1925 switch (table->mc_reg_address[i].s1) { in btc_set_mc_special_registers()
1928 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in btc_set_mc_special_registers()
1929 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in btc_set_mc_special_registers()
1941 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in btc_set_mc_special_registers()
1942 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in btc_set_mc_special_registers()
1957 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in btc_set_mc_special_registers()
1958 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in btc_set_mc_special_registers()
1985 table->mc_reg_address[i].s0 = in btc_set_s0_mc_reg_index()
1986 btc_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in btc_set_s0_mc_reg_index()
1987 address : table->mc_reg_address[i].s1; in btc_set_s0_mc_reg_index()
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Dcypress_dpm.h39 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
Dsi_dpm.h117 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
Dni_dpm.h57 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
Dni_dpm.c2717 switch (table->mc_reg_address[i].s1) { in ni_set_mc_special_registers()
2722 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ni_set_mc_special_registers()
2723 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in ni_set_mc_special_registers()
2733 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ni_set_mc_special_registers()
2734 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ni_set_mc_special_registers()
2748 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ni_set_mc_special_registers()
2749 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in ni_set_mc_special_registers()
2840 table->mc_reg_address[i].s0 = in ni_set_s0_mc_reg_index()
2841 ni_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in ni_set_s0_mc_reg_index()
2842 address : table->mc_reg_address[i].s1; in ni_set_s0_mc_reg_index()
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Dci_dpm.h87 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
Dci_dpm.c4346 switch(table->mc_reg_address[i].s1 << 2) { in ci_set_mc_special_registers()
4349 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in ci_set_mc_special_registers()
4350 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in ci_set_mc_special_registers()
4360 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in ci_set_mc_special_registers()
4361 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in ci_set_mc_special_registers()
4373 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers()
4374 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in ci_set_mc_special_registers()
4386 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in ci_set_mc_special_registers()
4387 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in ci_set_mc_special_registers()
4501 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index()
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Dsi_dpm.c5366 switch (table->mc_reg_address[i].s1 << 2) { in si_set_mc_special_registers()
5369 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS >> 2; in si_set_mc_special_registers()
5370 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP >> 2; in si_set_mc_special_registers()
5380 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS >> 2; in si_set_mc_special_registers()
5381 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP >> 2; in si_set_mc_special_registers()
5394 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers()
5395 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD >> 2; in si_set_mc_special_registers()
5406 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1 >> 2; in si_set_mc_special_registers()
5407 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP >> 2; in si_set_mc_special_registers()
5501 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index()
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Dradeon_mode.h668 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
Dradeon_atombios.c4024 reg_table->mc_reg_address[i].s1 = in radeon_atom_init_mc_reg_table()
4026 reg_table->mc_reg_address[i].pre_reg_data = in radeon_atom_init_mc_reg_table()
4042 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in radeon_atom_init_mc_reg_table()
4046 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in radeon_atom_init_mc_reg_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Diceland_smumgr.h57 SMU71_Discrete_MCRegisterAddress mc_reg_address[SMU71_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
Dci_smumgr.h58 SMU7_Discrete_MCRegisterAddress mc_reg_address[SMU7_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
Dtonga_smumgr.h59 SMU72_Discrete_MCRegisterAddress mc_reg_address[SMU72_DISCRETE_MC_REGISTER_ARRAY_SIZE]; member
Diceland_smumgr.c1700 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0); in iceland_populate_mc_reg_address()
1702 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s1); in iceland_populate_mc_reg_address()
2473 table->mc_reg_address[i].s0 = in iceland_set_s0_mc_reg_index()
2474 iceland_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) in iceland_set_s0_mc_reg_index()
2475 ? address : table->mc_reg_address[i].s1; in iceland_set_s0_mc_reg_index()
2491 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in iceland_copy_vbios_smc_reg_table()
2520 switch (table->mc_reg_address[i].s1) { in iceland_set_mc_special_registers()
2524 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in iceland_set_mc_special_registers()
2525 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in iceland_set_mc_special_registers()
2536 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in iceland_set_mc_special_registers()
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Dci_smumgr.c1733 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0); in ci_populate_mc_reg_address()
1735 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s1); in ci_populate_mc_reg_address()
2544 table->mc_reg_address[i].s0 = in ci_set_s0_mc_reg_index()
2545 ci_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) in ci_set_s0_mc_reg_index()
2546 ? address : table->mc_reg_address[i].s1; in ci_set_s0_mc_reg_index()
2562 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in ci_copy_vbios_smc_reg_table()
2591 switch (table->mc_reg_address[i].s1) { in ci_set_mc_special_registers()
2595 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in ci_set_mc_special_registers()
2596 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in ci_set_mc_special_registers()
2607 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in ci_set_mc_special_registers()
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Dtonga_smumgr.c2078 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s0); in tonga_populate_mc_reg_address()
2080 PP_HOST_TO_SMC_US(smu_data->mc_reg_table.mc_reg_address[j].s1); in tonga_populate_mc_reg_address()
2934 table->mc_reg_address[i].s0 = in tonga_set_s0_mc_reg_index()
2935 tonga_check_s0_mc_reg_index(table->mc_reg_address[i].s1, in tonga_set_s0_mc_reg_index()
2938 table->mc_reg_address[i].s1; in tonga_set_s0_mc_reg_index()
2954 ni_table->mc_reg_address[i].s1 = table->mc_reg_address[i].s1; in tonga_copy_vbios_smc_reg_table()
2983 switch (table->mc_reg_address[i].s1) { in tonga_set_mc_special_registers()
2988 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_EMRS; in tonga_set_mc_special_registers()
2989 table->mc_reg_address[j].s0 = mmMC_SEQ_PMG_CMD_EMRS_LP; in tonga_set_mc_special_registers()
3000 table->mc_reg_address[j].s1 = mmMC_PMG_CMD_MRS; in tonga_set_mc_special_registers()
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/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.h279 SMC_Evergreen_MCRegisterAddress mc_reg_address[SMC_EVERGREEN_MC_REGISTER_ARRAY_SIZE]; member
625 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE]; member
933 SMC_NIslands_MCRegisterAddress mc_reg_address[SMC_SISLANDS_MC_REGISTER_ARRAY_SIZE]; member
Damdgpu_atombios.h116 struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
Dsi_dpm.c5825 switch (table->mc_reg_address[i].s1) { in si_set_mc_special_registers()
5828 table->mc_reg_address[j].s1 = MC_PMG_CMD_EMRS; in si_set_mc_special_registers()
5829 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_EMRS_LP; in si_set_mc_special_registers()
5839 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS; in si_set_mc_special_registers()
5840 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS_LP; in si_set_mc_special_registers()
5853 table->mc_reg_address[j].s1 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers()
5854 table->mc_reg_address[j].s0 = MC_PMG_AUTO_CMD; in si_set_mc_special_registers()
5863 table->mc_reg_address[j].s1 = MC_PMG_CMD_MRS1; in si_set_mc_special_registers()
5864 table->mc_reg_address[j].s0 = MC_SEQ_PMG_CMD_MRS1_LP; in si_set_mc_special_registers()
5955 table->mc_reg_address[i].s0 = si_check_s0_mc_reg_index(table->mc_reg_address[i].s1, &address) ? in si_set_s0_mc_reg_index()
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Damdgpu_atombios.c1622 reg_table->mc_reg_address[i].s1 = in amdgpu_atombios_init_mc_reg_table()
1624 reg_table->mc_reg_address[i].pre_reg_data = in amdgpu_atombios_init_mc_reg_table()
1640 if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_FROM_TABLE) { in amdgpu_atombios_init_mc_reg_table()
1644 } else if ((reg_table->mc_reg_address[i].pre_reg_data & LOW_NIBBLE_MASK) == DATA_EQU_PREV) { in amdgpu_atombios_init_mc_reg_table()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dppatomctrl.h251 pp_atomctrl_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE]; member
Dppatomctrl.c69 if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing()
74 } else if ((table->mc_reg_address[i].uc_pre_reg_data & in atomctrl_retrieve_ac_timing()
118 table->mc_reg_address[i].s1 = in atomctrl_set_mc_reg_address_table()
120 table->mc_reg_address[i].uc_pre_reg_data = in atomctrl_set_mc_reg_address_table()