Searched refs:max_tile_pipes (Results 1 – 18 of 18) sorted by relevance
358 *value = rdev->config.cik.max_tile_pipes; in radeon_info_ioctl()360 *value = rdev->config.si.max_tile_pipes; in radeon_info_ioctl()362 *value = rdev->config.cayman.max_tile_pipes; in radeon_info_ioctl()364 *value = rdev->config.evergreen.max_tile_pipes; in radeon_info_ioctl()366 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()368 *value = rdev->config.r600.max_tile_pipes; in radeon_info_ioctl()
1198 rdev->config.rv770.max_tile_pipes = 8; in rv770_gpu_init()1218 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1242 rdev->config.rv770.max_tile_pipes = 2; in rv770_gpu_init()1262 rdev->config.rv770.max_tile_pipes = 4; in rv770_gpu_init()1324 switch (rdev->config.rv770.max_tile_pipes) { in rv770_gpu_init()1339 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; in rv770_gpu_init()
3159 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3181 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3203 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3226 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3248 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()3270 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3298 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3320 rdev->config.evergreen.max_tile_pipes = 8; in evergreen_gpu_init()3342 rdev->config.evergreen.max_tile_pipes = 4; in evergreen_gpu_init()3364 rdev->config.evergreen.max_tile_pipes = 2; in evergreen_gpu_init()[all …]
2016 unsigned max_tile_pipes; member2038 unsigned max_tile_pipes; member2065 unsigned max_tile_pipes; member2092 unsigned max_tile_pipes; member2130 unsigned max_tile_pipes; member2161 unsigned max_tile_pipes; member
2009 rdev->config.r600.max_tile_pipes = 8; in r600_gpu_init()2025 rdev->config.r600.max_tile_pipes = 2; in r600_gpu_init()2043 rdev->config.r600.max_tile_pipes = 1; in r600_gpu_init()2058 rdev->config.r600.max_tile_pipes = 4; in r600_gpu_init()2089 switch (rdev->config.r600.max_tile_pipes) { in r600_gpu_init()2105 rdev->config.r600.tiling_npipes = rdev->config.r600.max_tile_pipes; in r600_gpu_init()
3105 rdev->config.si.max_tile_pipes = 12; in si_gpu_init()3122 rdev->config.si.max_tile_pipes = 8; in si_gpu_init()3140 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3157 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3174 rdev->config.si.max_tile_pipes = 4; in si_gpu_init()3211 rdev->config.si.num_tile_pipes = rdev->config.si.max_tile_pipes; in si_gpu_init()
908 rdev->config.cayman.max_tile_pipes = 8; in cayman_gpu_init()932 rdev->config.cayman.max_tile_pipes = 2; in cayman_gpu_init()
2359 num_pipe_configs = rdev->config.cik.max_tile_pipes; in cik_tiling_mode_table_init()3193 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3210 rdev->config.cik.max_tile_pipes = 16; in cik_gpu_init()3227 rdev->config.cik.max_tile_pipes = 4; in cik_gpu_init()3246 rdev->config.cik.max_tile_pipes = 2; in cik_gpu_init()3281 rdev->config.cik.num_tile_pipes = rdev->config.cik.max_tile_pipes; in cik_gpu_init()
128 unsigned max_tile_pipes; member
1587 adev->gfx.config.max_tile_pipes = 12; in gfx_v6_0_constants_init()1604 adev->gfx.config.max_tile_pipes = 8; in gfx_v6_0_constants_init()1621 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_constants_init()1638 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_constants_init()1655 adev->gfx.config.max_tile_pipes = 4; in gfx_v6_0_constants_init()1685 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v6_0_constants_init()
4268 adev->gfx.config.max_tile_pipes = 4; in gfx_v7_0_gpu_early_init()4285 adev->gfx.config.max_tile_pipes = 16; in gfx_v7_0_gpu_early_init()4302 adev->gfx.config.max_tile_pipes = 4; in gfx_v7_0_gpu_early_init()4321 adev->gfx.config.max_tile_pipes = 2; in gfx_v7_0_gpu_early_init()4342 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v7_0_gpu_early_init()
487 config[no_regs++] = adev->gfx.config.max_tile_pipes; in amdgpu_debugfs_gca_config_read()
1721 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1738 adev->gfx.config.max_tile_pipes = 16; in gfx_v8_0_gpu_early_init()1785 adev->gfx.config.max_tile_pipes = 8; in gfx_v8_0_gpu_early_init()1802 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1819 adev->gfx.config.max_tile_pipes = 2; in gfx_v8_0_gpu_early_init()1836 adev->gfx.config.max_tile_pipes = 4; in gfx_v8_0_gpu_early_init()1857 adev->gfx.config.num_tile_pipes = adev->gfx.config.max_tile_pipes; in gfx_v8_0_gpu_early_init()
742 adev->gfx.config.max_tile_pipes = gfx_info->info.max_tile_pipes; in amdgpu_atombios_get_gfx_info()
1222 adev->gfx.config.max_tile_pipes = in gfx_v10_0_gpu_early_init()
1945 adev->gfx.config.max_tile_pipes = in gfx_v9_0_gpu_early_init()
1224 uint8_t max_tile_pipes; member1244 uint8_t max_tile_pipes; member
5651 UCHAR max_tile_pipes; member
