Home
last modified time | relevance | path

Searched refs:max_lanes (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/drivers/media/platform/cadence/
Dcdns-csi2rx.c75 u8 max_lanes; member
130 for (i = csi2rx->num_lanes; i < csi2rx->max_lanes; i++) { in csi2rx_start()
323 csi2rx->max_lanes = dev_cfg & 7; in csi2rx_get_resources()
324 if (csi2rx->max_lanes > CSI2RX_LANES_MAX) { in csi2rx_get_resources()
326 csi2rx->max_lanes); in csi2rx_get_resources()
391 if (csi2rx->num_lanes > csi2rx->max_lanes) { in csi2rx_parse_dt()
465 csi2rx->num_lanes, csi2rx->max_lanes, csi2rx->max_streams, in csi2rx_probe()
Dcdns-csi2tx.c116 unsigned int max_lanes; member
461 csi2tx->max_lanes = dev_cfg & CSI2TX_DEVICE_CONFIG_LANES_MASK; in csi2tx_get_resources()
462 if (csi2tx->max_lanes > CSI2TX_LANES_MAX) { in csi2tx_get_resources()
464 csi2tx->max_lanes); in csi2tx_get_resources()
516 if (csi2tx->num_lanes > csi2tx->max_lanes) { in csi2tx_check_lanes()
623 csi2tx->num_lanes, csi2tx->max_lanes, csi2tx->max_streams, in csi2tx_probe()
/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_tc.c264 int max_lanes; in icl_tc_phy_connect() local
276 max_lanes = intel_tc_port_fia_max_lane_count(dig_port); in icl_tc_phy_connect()
278 WARN_ON(max_lanes != 4); in icl_tc_phy_connect()
294 if (max_lanes < required_lanes) { in icl_tc_phy_connect()
297 max_lanes, required_lanes); in icl_tc_phy_connect()
Dintel_dp_mst.c432 int max_rate, mode_rate, max_lanes, max_link_clock; in intel_dp_mst_mode_valid() local
441 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mst_mode_valid()
443 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); in intel_dp_mst_mode_valid()
Dintel_dp.h109 int intel_dp_max_data_rate(int max_link_clock, int max_lanes);
Dintel_ddi.c2233 if (port == PORT_A && intel_dig_port->max_lanes == 4) in skl_ddi_set_iboost()
4244 int max_lanes = 4; in intel_ddi_max_lanes() local
4247 return max_lanes; in intel_ddi_max_lanes()
4251 max_lanes = port == PORT_A ? 4 : 0; in intel_ddi_max_lanes()
4254 max_lanes = 2; in intel_ddi_max_lanes()
4265 max_lanes = 4; in intel_ddi_max_lanes()
4268 return max_lanes; in intel_ddi_max_lanes()
4341 intel_dig_port->max_lanes = intel_ddi_max_lanes(intel_dig_port); in intel_ddi_init()
Dintel_dp.c220 int source_max = intel_dig_port->max_lanes; in intel_dp_max_common_lane_count()
240 intel_dp_max_data_rate(int max_link_clock, int max_lanes) in intel_dp_max_data_rate() argument
248 return max_link_clock * max_lanes; in intel_dp_max_data_rate()
597 int max_rate, mode_rate, max_lanes, max_link_clock; in intel_dp_mode_valid() local
618 max_lanes = intel_dp_max_lane_count(intel_dp); in intel_dp_mode_valid()
620 max_rate = intel_dp_max_data_rate(max_link_clock, max_lanes); in intel_dp_mode_valid()
638 max_lanes, in intel_dp_mode_valid()
7152 if (WARN(intel_dig_port->max_lanes < 1, in intel_dp_init_connector()
7154 intel_dig_port->max_lanes, port_name(port))) in intel_dp_init_connector()
7310 intel_dig_port->max_lanes = 4; in intel_dp_init()
Dintel_display_types.h1262 u8 max_lanes; member
Dintel_hdmi.c3080 if (WARN(intel_dig_port->max_lanes < 4, in intel_hdmi_init_connector()
3082 intel_dig_port->max_lanes, port_name(port))) in intel_hdmi_init_connector()
3236 intel_dig_port->max_lanes = 4; in intel_hdmi_init()
/Linux-v5.4/drivers/gpu/drm/gma500/
Dcdv_intel_dp.c374 cdv_intel_dp_max_data_rate(int max_link_clock, int max_lanes) in cdv_intel_dp_max_data_rate() argument
376 return (max_link_clock * max_lanes * 19) / 20; in cdv_intel_dp_max_data_rate()
516 int max_lanes = cdv_intel_dp_max_lane_count(encoder); in cdv_intel_dp_mode_valid() local
530 > cdv_intel_dp_max_data_rate(max_link_clock, max_lanes))) in cdv_intel_dp_mode_valid()
535 > cdv_intel_dp_max_data_rate(max_link_clock, max_lanes)) in cdv_intel_dp_mode_valid()
/Linux-v5.4/drivers/gpu/drm/bridge/analogix/
Danalogix_dp_core.c640 u32 max_lanes, u32 max_rate) in analogix_dp_full_link_train() argument
670 if (dp->link_train.lane_count > max_lanes) in analogix_dp_full_link_train()
671 dp->link_train.lane_count = max_lanes; in analogix_dp_full_link_train()