Searched refs:max_dispclk_vmid0p72 (Results 1 – 2 of 2) sorted by relevance
123 float max_dispclk_vmid0p72; member557 float max_dispclk_vmid0p72; /*MHz*/ member
86 .max_dispclk_vmid0p72 = 960, /* MHz, = 3600/3.75 */760 v->max_dispclk_vmid0p72 = dc->dcn_soc->max_dispclk_vmid0p72; in dcn_validate_bandwidth()847 v->max_dispclk[1] = v->max_dispclk_vmid0p72; in dcn_validate_bandwidth()1306 } else if (clocks_in_khz > dc->dcn_soc->max_dispclk_vmid0p72*1000) { in dcn_find_normalized_clock_vdd_Level()1601 dc->dcn_soc->max_dispclk_vmid0p72 * 1000, in dcn_bw_sync_calcs_and_dml()
