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Searched refs:malidp_write32_mask (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/arm/display/komeda/d71/
Dd71_dev.c49 malidp_write32_mask(reg, BLK_STATUS, restore, 0); in get_lpu_event()
75 malidp_write32_mask(reg, LPU_TBU_STATUS, restore, 0); in get_lpu_event()
101 malidp_write32_mask(reg, BLK_STATUS, status, 0); in get_cu_event()
143 malidp_write32_mask(reg, BLK_STATUS, restore, 0); in get_dou_event()
184 malidp_write32_mask(d71->gcu_addr, BLK_STATUS, in d71_irq_handler()
213 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, in d71_enable_irq()
217 malidp_write32_mask(pipe->cu_addr, BLK_IRQ_MASK, in d71_enable_irq()
219 malidp_write32_mask(pipe->lpu_addr, BLK_IRQ_MASK, in d71_enable_irq()
221 malidp_write32_mask(pipe->dou_addr, BLK_IRQ_MASK, in d71_enable_irq()
233 malidp_write32_mask(d71->gcu_addr, BLK_IRQ_MASK, ENABLED_GCU_IRQS, 0); in d71_disable_irq()
[all …]
Dd71_component.c194 malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0); in d71_layer_disable()
266 malidp_write32_mask(reg, BLK_CONTROL, ctrl_mask, ctrl); in d71_layer_update()
394 malidp_write32_mask(reg, BLK_CONTROL, mask, ctrl); in d71_wb_layer_update()
429 malidp_write32_mask(c->reg, BLK_CONTROL, L_EN, 0); in d71_wb_layer_disable()
1026 malidp_write32_mask(c->reg, BLK_CONTROL, BS_CTRL_EN, 0); in d71_timing_ctrlr_disable()
/Linux-v5.4/drivers/gpu/drm/arm/display/include/
Dmalidp_io.h32 malidp_write32_mask(u32 __iomem *base, u32 offset, u32 m, u32 v) in malidp_write32_mask() function