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/Linux-v5.4/drivers/net/ethernet/mellanox/mlx4/
Dfw_qos.c87 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_PRIO2TC() local
93 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_PRIO2TC()
94 if (IS_ERR(mailbox)) in mlx4_SET_PORT_PRIO2TC()
95 return PTR_ERR(mailbox); in mlx4_SET_PORT_PRIO2TC()
97 context = mailbox->buf; in mlx4_SET_PORT_PRIO2TC()
103 err = mlx4_cmd(dev, mailbox->dma, in_mod, 1, MLX4_CMD_SET_PORT, in mlx4_SET_PORT_PRIO2TC()
106 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_SET_PORT_PRIO2TC()
114 struct mlx4_cmd_mailbox *mailbox; in mlx4_SET_PORT_SCHEDULER() local
120 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_SET_PORT_SCHEDULER()
121 if (IS_ERR(mailbox)) in mlx4_SET_PORT_SCHEDULER()
[all …]
Dsrq.c64 static int mlx4_SW2HW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_SRQ() argument
67 return mlx4_cmd(dev, mailbox->dma, srq_num, 0, in mlx4_SW2HW_SRQ()
72 static int mlx4_HW2SW_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_SRQ() argument
75 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, srq_num, in mlx4_HW2SW_SRQ()
76 mailbox ? 0 : 1, MLX4_CMD_HW2SW_SRQ, in mlx4_HW2SW_SRQ()
86 static int mlx4_QUERY_SRQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_QUERY_SRQ() argument
89 return mlx4_cmd_box(dev, 0, mailbox->dma, srq_num, 0, MLX4_CMD_QUERY_SRQ, in mlx4_QUERY_SRQ()
166 struct mlx4_cmd_mailbox *mailbox; in mlx4_srq_alloc() local
181 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_srq_alloc()
182 if (IS_ERR(mailbox)) { in mlx4_srq_alloc()
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Dmcg.c54 struct mlx4_cmd_mailbox *mailbox, in mlx4_QP_FLOW_STEERING_ATTACH() argument
61 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, size, 0, in mlx4_QP_FLOW_STEERING_ATTACH()
83 struct mlx4_cmd_mailbox *mailbox) in mlx4_READ_ENTRY() argument
85 return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, in mlx4_READ_ENTRY()
90 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_ENTRY() argument
92 return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, in mlx4_WRITE_ENTRY()
97 struct mlx4_cmd_mailbox *mailbox) in mlx4_WRITE_PROMISC() argument
102 return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, in mlx4_WRITE_PROMISC()
107 static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_GID_HASH() argument
113 err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, in mlx4_GID_HASH()
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Dcq.c146 static int mlx4_SW2HW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_CQ() argument
149 return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, in mlx4_SW2HW_CQ()
154 static int mlx4_MODIFY_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_MODIFY_CQ() argument
157 return mlx4_cmd(dev, mailbox->dma, cq_num, opmod, MLX4_CMD_MODIFY_CQ, in mlx4_MODIFY_CQ()
161 static int mlx4_HW2SW_CQ(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_CQ() argument
164 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, in mlx4_HW2SW_CQ()
165 cq_num, mailbox ? 0 : 1, MLX4_CMD_HW2SW_CQ, in mlx4_HW2SW_CQ()
172 struct mlx4_cmd_mailbox *mailbox; in mlx4_cq_modify() local
176 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_cq_modify()
177 if (IS_ERR(mailbox)) in mlx4_cq_modify()
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Dfw.c180 struct mlx4_cmd_mailbox *mailbox; in mlx4_MOD_STAT_CFG() local
189 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_MOD_STAT_CFG()
190 if (IS_ERR(mailbox)) in mlx4_MOD_STAT_CFG()
191 return PTR_ERR(mailbox); in mlx4_MOD_STAT_CFG()
192 inbox = mailbox->buf; in mlx4_MOD_STAT_CFG()
197 err = mlx4_cmd(dev, mailbox->dma, 0, 0, MLX4_CMD_MOD_STAT_CFG, in mlx4_MOD_STAT_CFG()
200 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_MOD_STAT_CFG()
206 struct mlx4_cmd_mailbox *mailbox; in mlx4_QUERY_FUNC() local
221 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_QUERY_FUNC()
222 if (IS_ERR(mailbox)) in mlx4_QUERY_FUNC()
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Dmr.c276 static int mlx4_SW2HW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_SW2HW_MPT() argument
279 return mlx4_cmd(dev, mailbox->dma, mpt_index, in mlx4_SW2HW_MPT()
284 static int mlx4_HW2SW_MPT(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, in mlx4_HW2SW_MPT() argument
287 return mlx4_cmd_box(dev, 0, mailbox ? mailbox->dma : 0, mpt_index, in mlx4_HW2SW_MPT()
288 !mailbox, MLX4_CMD_HW2SW_MPT, in mlx4_HW2SW_MPT()
298 struct mlx4_cmd_mailbox *mailbox = NULL; in mlx4_mr_hw_get_mpt() local
317 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_mr_hw_get_mpt()
318 if (IS_ERR(mailbox)) in mlx4_mr_hw_get_mpt()
319 return PTR_ERR(mailbox); in mlx4_mr_hw_get_mpt()
321 err = mlx4_cmd_box(dev, 0, mailbox->dma, key, in mlx4_mr_hw_get_mpt()
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Dport.c130 struct mlx4_cmd_mailbox *mailbox; in mlx4_set_port_mac_table() local
134 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_set_port_mac_table()
135 if (IS_ERR(mailbox)) in mlx4_set_port_mac_table()
136 return PTR_ERR(mailbox); in mlx4_set_port_mac_table()
138 memcpy(mailbox->buf, entries, MLX4_MAC_TABLE_SIZE); in mlx4_set_port_mac_table()
142 err = mlx4_cmd(dev, mailbox->dma, in_mod, MLX4_SET_PORT_ETH_OPCODE, in mlx4_set_port_mac_table()
146 mlx4_free_cmd_mailbox(dev, mailbox); in mlx4_set_port_mac_table()
539 struct mlx4_cmd_mailbox *mailbox; in mlx4_set_port_vlan_table() local
543 mailbox = mlx4_alloc_cmd_mailbox(dev); in mlx4_set_port_vlan_table()
544 if (IS_ERR(mailbox)) in mlx4_set_port_vlan_table()
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/Linux-v5.4/drivers/mailbox/
DMakefile4 obj-$(CONFIG_MAILBOX) += mailbox.o
6 obj-$(CONFIG_MAILBOX_TEST) += mailbox-test.o
10 obj-$(CONFIG_IMX_MBOX) += imx-mailbox.o
12 obj-$(CONFIG_ARMADA_37XX_RWTM_MBOX) += armada-37xx-rwtm-mailbox.o
18 obj-$(CONFIG_OMAP2PLUS_MBOX) += omap-mailbox.o
20 obj-$(CONFIG_ROCKCHIP_MBOX) += rockchip-mailbox.o
24 obj-$(CONFIG_ALTERA_MBOX) += mailbox-altera.o
26 obj-$(CONFIG_BCM2835_MBOX) += bcm2835-mailbox.o
28 obj-$(CONFIG_STI_MBOX) += mailbox-sti.o
32 obj-$(CONFIG_XGENE_SLIMPRO_MBOX) += mailbox-xgene-slimpro.o
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/Linux-v5.4/arch/arm64/kernel/
Dacpi_parking_protocol.c21 struct parking_protocol_mailbox __iomem *mailbox; member
62 struct parking_protocol_mailbox __iomem *mailbox; in acpi_parking_protocol_cpu_boot() local
76 mailbox = ioremap(cpu_entry->mailbox_addr, sizeof(*mailbox)); in acpi_parking_protocol_cpu_boot()
77 if (!mailbox) in acpi_parking_protocol_cpu_boot()
80 cpu_id = readl_relaxed(&mailbox->cpu_id); in acpi_parking_protocol_cpu_boot()
86 iounmap(mailbox); in acpi_parking_protocol_cpu_boot()
94 cpu_entry->mailbox = mailbox; in acpi_parking_protocol_cpu_boot()
102 writeq_relaxed(__pa_symbol(secondary_entry), &mailbox->entry_point); in acpi_parking_protocol_cpu_boot()
103 writel_relaxed(cpu_entry->gic_cpu_id, &mailbox->cpu_id); in acpi_parking_protocol_cpu_boot()
114 struct parking_protocol_mailbox __iomem *mailbox = cpu_entry->mailbox; in acpi_parking_protocol_cpu_postboot() local
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/Linux-v5.4/drivers/infiniband/hw/mthca/
Dmthca_mcg.c67 struct mthca_mailbox *mailbox; in find_mgm() local
72 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in find_mgm()
73 if (IS_ERR(mailbox)) in find_mgm()
75 mgid = mailbox->buf; in find_mgm()
79 err = mthca_MGID_HASH(dev, mailbox, hash); in find_mgm()
116 mthca_free_mailbox(dev, mailbox); in find_mgm()
123 struct mthca_mailbox *mailbox; in mthca_multicast_attach() local
131 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); in mthca_multicast_attach()
132 if (IS_ERR(mailbox)) in mthca_multicast_attach()
133 return PTR_ERR(mailbox); in mthca_multicast_attach()
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Dmthca_cmd.c612 struct mthca_mailbox *mailbox; in mthca_alloc_mailbox() local
614 mailbox = kmalloc(sizeof *mailbox, gfp_mask); in mthca_alloc_mailbox()
615 if (!mailbox) in mthca_alloc_mailbox()
618 mailbox->buf = dma_pool_alloc(dev->cmd.pool, gfp_mask, &mailbox->dma); in mthca_alloc_mailbox()
619 if (!mailbox->buf) { in mthca_alloc_mailbox()
620 kfree(mailbox); in mthca_alloc_mailbox()
624 return mailbox; in mthca_alloc_mailbox()
627 void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox) in mthca_free_mailbox() argument
629 if (!mailbox) in mthca_free_mailbox()
632 dma_pool_free(dev->cmd.pool, mailbox->buf, mailbox->dma); in mthca_free_mailbox()
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Dmthca_cmd.h253 void mthca_free_mailbox(struct mthca_dev *dev, struct mthca_mailbox *mailbox);
283 int mthca_SW2HW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
285 int mthca_HW2SW_MPT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
287 int mthca_WRITE_MTT(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
292 int mthca_SW2HW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
294 int mthca_HW2SW_EQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
296 int mthca_SW2HW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
298 int mthca_HW2SW_CQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
301 int mthca_SW2HW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
303 int mthca_HW2SW_SRQ(struct mthca_dev *dev, struct mthca_mailbox *mailbox,
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/Linux-v5.4/Documentation/devicetree/bindings/mailbox/
Domap-mailbox.txt4 The OMAP mailbox hardware facilitates communication between different processors
5 using a queued mailbox interrupt mechanism. The IP block is external to the
10 Each mailbox IP block/cluster has a certain number of h/w fifo queues and output
40 "ti,omap2-mailbox" for OMAP2420, OMAP2430 SoCs
41 "ti,omap3-mailbox" for OMAP3430, OMAP3630 SoCs
42 "ti,omap4-mailbox" for OMAP44xx, OMAP54xx, AM33xx,
44 "ti,am654-mailbox" for K3 AM65x and J721E SoCs
45 - reg: Contains the mailbox register address range (base
47 - interrupts: Contains the interrupt information for the mailbox
50 - #mbox-cells: Common mailbox binding property to identify the number
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Dmailbox.txt4 assign appropriate mailbox channel to client drivers.
9 - #mbox-cells: Must be at least 1. Number of cells in a mailbox
13 mailbox: mailbox {
22 - mboxes: List of phandle and mailbox channel specifiers.
25 - mbox-names: List of identifier strings for each mailbox channel.
27 users of these mailboxes for IPC, one for each mailbox. This shared
29 communication between the mailbox client and the remote.
36 mboxes = <&mailbox 0 &mailbox 1>;
57 mboxes = <&mailbox 0>;
Daltera-mailbox.txt5 - compatible : "altr,mailbox-1.0".
6 - reg : physical base address of the mailbox and length of
8 - #mbox-cells: Common mailbox binding property to identify the number
9 of cells required for the mailbox specifier. Should be 1.
16 mbox_tx: mailbox@100 {
17 compatible = "altr,mailbox-1.0";
24 mbox_rx: mailbox@200 {
25 compatible = "altr,mailbox-1.0";
35 Documentation/devicetree/bindings/mailbox/mailbox.txt for details). Each value
36 of the mboxes property should contain a phandle to the mailbox controller
Dxlnx,zynqmp-ipi-mailbox.txt4 The Xilinx IPI(Inter Processor Interrupt) mailbox controller is to manage
35 - compatible: Shall be: "xlnx,zynqmp-ipi-mailbox"
40 - #address-cells: number of address cells of internal IPI mailbox nodes
41 - #size-cells: number of size cells of internal IPI mailbox nodes
43 Internal IPI mailbox node:
60 - xlnx,ipi-id: remote Xilinx IPI agent ID of which the mailbox is
73 - mboxes: Standard property to specify a mailbox
74 (See ./mailbox.txt)
75 - mbox-names: List of identifier strings for each mailbox
81 compatible = "xlnx,zynqmp-ipi-mailbox";
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Dhisilicon,hi6220-mailbox.txt4 Hisilicon Hi6220 mailbox supports up to 32 channels. Each channel
15 - reg: Contains the mailbox register address range (base
19 - #mbox-cells: Common mailbox binding property to identify the number
20 of cells required for the mailbox specifier. Must be 3.
22 phandle: Label name of mailbox controller
27 mailbox driver uses it to acknowledge interrupt
28 - interrupts: Contains the interrupt information for the mailbox
34 - hi6220,mbox-tx-noirq: Property of MCU firmware's feature, so mailbox driver
42 mailbox: mailbox@f7510000 {
58 - mboxes: Standard property to specify a Mailbox (See ./mailbox.txt)
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Dxgene-slimpro-mailbox.txt1 The APM X-Gene SLIMpro mailbox is used to communicate messages between
6 There are total of 8 interrupts in this mailbox. Each used for an individual
7 door bell (or mailbox channel).
12 - reg: Contains the mailbox register address range.
15 the interrupt for mailbox channel 0 and interrupt 1 for
16 mailbox channel 1 and so likewise for the reminder.
18 - #mbox-cells: only one to specify the mailbox channel number.
23 mailbox: mailbox@10540000 {
Drockchip-mailbox.txt1 Rockchip mailbox
3 The Rockchip mailbox is used by the Rockchip CPU cores to communicate
6 Refer to ./mailbox.txt for generic information about mailbox device-tree
17 - #mbox-cells: Common mailbox binding property to identify the number
18 of cells required for the mailbox specifier. Should be 1
25 compatible = "rockchip,rk3368-mailbox";
Dbrcm,bcm2835-mbox.txt1 Broadcom BCM2835 VideoCore mailbox IPC
9 - #mbox-cells: Specifies the number of cells needed to encode a mailbox
11 mailbox channel implemented by the device.
15 mailbox: mailbox@7e00b880 {
24 mboxes = <&mailbox>;
Dsti-mailbox.txt10 - compatible : Should be "st,stih407-mailbox"
12 - mbox-name : Name of the mailbox
20 - interrupts : Contains the IRQ line for a Rx mailbox
24 mailbox0: mailbox@0 {
25 compatible = "st,stih407-mailbox";
38 - mboxes : Standard property to specify a Mailbox (See ./mailbox.txt)
47 compatible = "mailbox-test";
/Linux-v5.4/drivers/infiniband/hw/hns/
Dhns_roce_hw_v2_dfx.c13 struct hns_roce_cmd_mailbox *mailbox; in hns_roce_v2_query_cqc_info() local
16 mailbox = hns_roce_alloc_cmd_mailbox(hr_dev); in hns_roce_v2_query_cqc_info()
17 if (IS_ERR(mailbox)) in hns_roce_v2_query_cqc_info()
18 return PTR_ERR(mailbox); in hns_roce_v2_query_cqc_info()
20 cq_context = mailbox->buf; in hns_roce_v2_query_cqc_info()
21 ret = hns_roce_cmd_mbox(hr_dev, 0, mailbox->dma, cqn, 0, in hns_roce_v2_query_cqc_info()
32 hns_roce_free_cmd_mailbox(hr_dev, mailbox); in hns_roce_v2_query_cqc_info()
Dhns_roce_cmd.c268 struct hns_roce_cmd_mailbox *mailbox; in hns_roce_alloc_cmd_mailbox() local
270 mailbox = kmalloc(sizeof(*mailbox), GFP_KERNEL); in hns_roce_alloc_cmd_mailbox()
271 if (!mailbox) in hns_roce_alloc_cmd_mailbox()
274 mailbox->buf = dma_pool_alloc(hr_dev->cmd.pool, GFP_KERNEL, in hns_roce_alloc_cmd_mailbox()
275 &mailbox->dma); in hns_roce_alloc_cmd_mailbox()
276 if (!mailbox->buf) { in hns_roce_alloc_cmd_mailbox()
277 kfree(mailbox); in hns_roce_alloc_cmd_mailbox()
281 return mailbox; in hns_roce_alloc_cmd_mailbox()
285 struct hns_roce_cmd_mailbox *mailbox) in hns_roce_free_cmd_mailbox() argument
287 if (!mailbox) in hns_roce_free_cmd_mailbox()
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/Linux-v5.4/drivers/net/appletalk/
Dltpc.h21 unsigned char mailbox; member
26 unsigned char mailbox; member
33 unsigned char mailbox; member
39 unsigned char mailbox; member
44 unsigned char mailbox; member
50 unsigned char mailbox; member
/Linux-v5.4/drivers/scsi/smartpqi/
Dsmartpqi_sis.c154 u32 mailbox[6]; /* mailboxes 0-5 */ member
176 writel(params->mailbox[i], &registers->sis_mailbox[i]); in sis_send_sync_cmd()
222 params->mailbox[0] = cmd_status; in sis_send_sync_cmd()
223 for (i = 1; i < ARRAY_SIZE(params->mailbox); i++) in sis_send_sync_cmd()
224 params->mailbox[i] = readl(&registers->sis_mailbox[i]); in sis_send_sync_cmd()
247 properties = params.mailbox[1]; in sis_get_ctrl_properties()
252 extended_properties = params.mailbox[4]; in sis_get_ctrl_properties()
276 ctrl_info->max_sg_entries = params.mailbox[1]; in sis_get_pqi_capabilities()
277 ctrl_info->max_transfer_size = params.mailbox[2]; in sis_get_pqi_capabilities()
278 ctrl_info->max_outstanding_requests = params.mailbox[3]; in sis_get_pqi_capabilities()
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