| /Linux-v5.4/drivers/staging/media/omap4iss/ |
| D | iss_csiphy.c | 36 reg |= (phy->lanes.data[i].pol ? in csiphy_lanes_config()
38 reg |= (phy->lanes.data[i].pos << in csiphy_lanes_config()
44 reg |= phy->lanes.clk.pol ? CSI2_COMPLEXIO_CFG_CLOCK_POL : 0; in csiphy_lanes_config()
45 reg |= phy->lanes.clk.pos << CSI2_COMPLEXIO_CFG_CLOCK_POSITION_SHIFT; in csiphy_lanes_config()
123 struct iss_csiphy_lanes_cfg *lanes; in omap4iss_csiphy_config() local
128 lanes = &subdevs->bus.csi2.lanecfg; in omap4iss_csiphy_config()
175 if (lanes->data[i].pos == 0) in omap4iss_csiphy_config()
178 if (lanes->data[i].pol > 1 || in omap4iss_csiphy_config()
179 lanes->data[i].pos > (csi2->phy->max_data_lanes + 1)) in omap4iss_csiphy_config()
182 if (used_lanes & (1 << lanes->data[i].pos)) in omap4iss_csiphy_config()
[all …]
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| /Linux-v5.4/drivers/media/platform/omap3isp/ |
| D | ispcsiphy.c | 166 struct isp_csiphy_lanes_cfg *lanes; in omap3isp_csiphy_config() local
174 lanes = &buscfg->bus.ccp2.lanecfg; in omap3isp_csiphy_config()
177 lanes = &buscfg->bus.csi2.lanecfg; in omap3isp_csiphy_config()
186 if (lanes->data[i].pol > 1 || lanes->data[i].pos > 3) in omap3isp_csiphy_config()
189 if (used_lanes & (1 << lanes->data[i].pos)) in omap3isp_csiphy_config()
192 used_lanes |= 1 << lanes->data[i].pos; in omap3isp_csiphy_config()
195 if (lanes->clk.pol > 1 || lanes->clk.pos > 3) in omap3isp_csiphy_config()
198 if (lanes->clk.pos == 0 || used_lanes & (1 << lanes->clk.pos)) in omap3isp_csiphy_config()
244 reg |= (lanes->data[i].pol << in omap3isp_csiphy_config()
246 reg |= (lanes->data[i].pos << in omap3isp_csiphy_config()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/bridge/adv7511/ |
| D | adv7533.c | 43 clock_div_by_lanes[dsi->lanes - 2] << 3); in adv7511_dsi_config_timing_gen()
74 regmap_write(adv->regmap_cec, 0x1c, dsi->lanes << 4); in adv7533_dsi_power_on()
106 int lanes, ret; in adv7533_mode_set() local
112 lanes = 4; in adv7533_mode_set()
114 lanes = 3; in adv7533_mode_set()
116 if (lanes != dsi->lanes) { in adv7533_mode_set()
118 dsi->lanes = lanes; in adv7533_mode_set()
165 dsi->lanes = adv->num_dsi_lanes; in adv7533_attach_dsi()
|
| /Linux-v5.4/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | hdmi_common.c | 20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
|
| /Linux-v5.4/drivers/gpu/drm/omapdrm/dss/ |
| D | hdmi_common.c | 20 u32 lanes[8]; in hdmi_parse_lanes_of() local
22 if (len / sizeof(u32) != ARRAY_SIZE(lanes)) { in hdmi_parse_lanes_of()
27 r = of_property_read_u32_array(ep, "lanes", lanes, in hdmi_parse_lanes_of()
28 ARRAY_SIZE(lanes)); in hdmi_parse_lanes_of()
34 r = hdmi_phy_parse_lanes(phy, lanes); in hdmi_parse_lanes_of()
|
| /Linux-v5.4/drivers/net/ethernet/netronome/nfp/ |
| D | nfp_devlink.c | 40 nfp_devlink_set_lanes(struct nfp_pf *pf, unsigned int idx, unsigned int lanes) in nfp_devlink_set_lanes() argument
49 ret = __nfp_eth_set_split(nsp, lanes); in nfp_devlink_set_lanes()
70 unsigned int lanes; in nfp_devlink_port_split() local
90 lanes = eth_port.port_lanes / count; in nfp_devlink_port_split()
91 if (eth_port.lanes == 10 && count == 2) in nfp_devlink_port_split()
92 lanes = 8 / count; in nfp_devlink_port_split()
94 ret = nfp_devlink_set_lanes(pf, eth_port.index, lanes); in nfp_devlink_port_split()
107 unsigned int lanes; in nfp_devlink_port_unsplit() local
124 lanes = eth_port.port_lanes; in nfp_devlink_port_unsplit()
126 lanes = 10; in nfp_devlink_port_unsplit()
[all …]
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| /Linux-v5.4/drivers/nubus/ |
| D | proc.c | 73 int lanes = board->lanes; in nubus_proc_add_rsrc_dir() local
78 return proc_mkdir_data(name, 0555, procdir, (void *)lanes); in nubus_proc_add_rsrc_dir()
120 int lanes = (int)proc_get_parent_data(inode); in nubus_proc_rsrc_show() local
123 if (!lanes) in nubus_proc_rsrc_show()
126 ent.mask = lanes; in nubus_proc_rsrc_show()
|
| /Linux-v5.4/Documentation/devicetree/bindings/phy/ |
| D | phy-cadence-sierra.txt | 26 Each group of PHY lanes with a single master lane should be represented as
39 - cdns,num-lanes: Number of lanes in this group. From 1 to 4. The
40 group is made up of consecutive lanes.
42 configuration of lanes.
57 cdns,num-lanes = <2>;
64 cdns,num-lanes = <1>;
|
| D | nvidia,tegra124-xusb-padctl.txt | 4 The Tegra XUSB pad controller manages a set of I/O lanes (with differential
7 documentation. Each such "pad" may control either one or multiple lanes,
8 and thus contains any logic common to all its lanes. Each lane can be
11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
15 ports (e.g. PCIe) and the lanes.
75 the pad and any of its lanes, this property must be set to "okay".
122 Each pad node has a child named "lanes" that contains one or more children of
123 its own, each representing one of the lanes controlled by the pad.
259 lanes {
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/pci/ |
| D | nvidia,tegra20-pcie.txt | 104 - If lanes 0 to 3 are used:
107 - If lanes 4 or 5 are used:
160 - nvidia,num-lanes: Number of lanes to use for this port. Valid combinations
162 - Root port 0 uses 4 lanes, root port 1 is unused.
163 - Both root ports use 2 lanes.
169 number of lanes in the nvidia,num-lanes property. Entries are of the form
170 "pcie-N": where N ranges from 0 to the value specified in nvidia,num-lanes.
222 nvidia,num-lanes = <2>;
236 nvidia,num-lanes = <2>;
328 nvidia,num-lanes = <2>;
[all …]
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| /Linux-v5.4/drivers/phy/tegra/ |
| D | xusb.c | 35 if (!pad->lanes[i]) in tegra_xusb_pad_of_xlate()
38 if (pad->lanes[i]->dev.of_node == args->np) { in tegra_xusb_pad_of_xlate()
39 phy = pad->lanes[i]; in tegra_xusb_pad_of_xlate()
91 struct device_node *np, *lanes; in tegra_xusb_pad_find_phy_node() local
93 lanes = of_get_child_by_name(pad->dev.of_node, "lanes"); in tegra_xusb_pad_find_phy_node()
94 if (!lanes) in tegra_xusb_pad_find_phy_node()
97 np = of_get_child_by_name(lanes, pad->soc->lanes[index].name); in tegra_xusb_pad_find_phy_node()
98 of_node_put(lanes); in tegra_xusb_pad_find_phy_node()
187 pad->lanes = devm_kcalloc(&pad->dev, pad->soc->num_lanes, sizeof(lane), in tegra_xusb_pad_register()
189 if (!pad->lanes) { in tegra_xusb_pad_register()
[all …]
|
| /Linux-v5.4/drivers/gpu/drm/rockchip/ |
| D | cdn-dp-core.c | 147 u8 lanes; in cdn_dp_get_port_lanes() local
154 lanes = 2; in cdn_dp_get_port_lanes()
156 lanes = 4; in cdn_dp_get_port_lanes()
158 lanes = 0; in cdn_dp_get_port_lanes()
161 return lanes; in cdn_dp_get_port_lanes()
181 int i, lanes; in cdn_dp_connected_port() local
185 lanes = cdn_dp_get_port_lanes(port); in cdn_dp_connected_port()
186 if (lanes) in cdn_dp_connected_port()
283 u8 lanes, bpc; in cdn_dp_connector_mode_valid() local
303 source_max = dp->lanes; in cdn_dp_connector_mode_valid()
[all …]
|
| /Linux-v5.4/Documentation/devicetree/bindings/media/i2c/ |
| D | adv748x.txt | 52 endpoint. Each of those endpoints shall contain the data-lanes property as
56 - data-lanes: an array of physical data lane indexes
58 sources are described. For TXA 1, 2 or 4 data lanes can be described
101 clock-lanes = <0>;
102 data-lanes = <1 2 3 4>;
111 clock-lanes = <0>;
112 data-lanes = <1>;
|
| D | ov2680.txt | 22 - clock-lanes: should be set to <0> (clock lane on hardware lane 0).
23 - data-lanes: should be set to <1> (one CSI-2 lane supported).
41 clock-lanes = <0>;
42 data-lanes = <1>;
|
| D | tc358743.txt | 16 - data-lanes: should be <1 2 3 4> for four-lane operation,
18 - clock-lanes: should be <0>
42 data-lanes = <1 2 3 4>;
43 clock-lanes = <0>;
|
| D | ov5640.txt | 29 - clock-lanes: should be set to <0> (clock lane on hardware lane 0)
30 - data-lanes: should be set to <1> or <1 2> (one or two CSI-2 lanes supported)
64 clock-lanes = <0>;
65 data-lanes = <1 2>;
|
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | omap3-n9.dts | 31 clock-lanes = <0>;
32 data-lanes = <1 2>;
54 clock-lanes = <2>;
55 data-lanes = <1 3>;
|
| /Linux-v5.4/arch/arm64/boot/dts/nvidia/ |
| D | tegra210-p2371-2180.dts | 22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
|
| D | tegra186-p2771-0000.dts | 133 lanes {
154 lanes {
198 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>,
199 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>,
200 <&{/padctl@3520000/pads/usb3/lanes/usb3-0}>;
226 nvidia,num-lanes = <4>;
231 nvidia,num-lanes = <0>;
236 nvidia,num-lanes = <1>;
|
| /Linux-v5.4/drivers/phy/ |
| D | phy-core-mipi-dphy.c | 24 unsigned int lanes, in phy_mipi_dphy_get_default_config() argument
34 do_div(hs_clk_rate, lanes); in phy_mipi_dphy_get_default_config()
76 cfg->lanes = lanes; in phy_mipi_dphy_get_default_config()
|
| /Linux-v5.4/Documentation/devicetree/bindings/media/ |
| D | samsung-mipi-csis.txt | 13 - bus-width : maximum number of data lanes supported (SoC specific);
42 - data-lanes : (required) an array specifying active physical MIPI-CSI2
43 data input lanes and their mapping to logical lanes; the
77 data-lanes = <1>, <2>;
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| /Linux-v5.4/drivers/gpu/drm/hisilicon/kirin/ |
| D | dw_drm_dsi.c | 89 u32 lanes; member
331 u32 lanes) in dsi_set_phy_timer() argument
338 val = (lanes - 1) | (PHY_STOP_WAIT_TIME << 8); in dsi_set_phy_timer()
364 u32 lanes) in dsi_set_mipi_phy() argument
371 dsi_set_phy_timer(base, phy, lanes); in dsi_set_mipi_phy()
395 for (i = 0; i < lanes; i++) { in dsi_set_mipi_phy()
548 dphy_req_kHz = mode->clock * bpp / dsi->lanes; in dsi_mipi_init()
555 dsi_set_mipi_phy(base, phy, dsi->lanes); in dsi_mipi_init()
567 dsi->lanes, mode->clock, phy->lane_byte_clk_kHz); in dsi_mipi_init()
618 req_kHz = mode->clock * bpp / dsi->lanes; in dsi_encoder_phy_mode_valid()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/vc4/ |
| D | vc4_dsi.c | 514 u32 lanes; member
680 (dsi->lanes > 1 ? DSI_PHYC_DLANE1_ULPS : 0) | in vc4_dsi_ulps()
681 (dsi->lanes > 2 ? DSI_PHYC_DLANE2_ULPS : 0) | in vc4_dsi_ulps()
682 (dsi->lanes > 3 ? DSI_PHYC_DLANE3_ULPS : 0)); in vc4_dsi_ulps()
685 (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_ULPS : 0) | in vc4_dsi_ulps()
686 (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_ULPS : 0) | in vc4_dsi_ulps()
687 (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_ULPS : 0)); in vc4_dsi_ulps()
690 (dsi->lanes > 1 ? DSI1_STAT_PHY_D1_STOP : 0) | in vc4_dsi_ulps()
691 (dsi->lanes > 2 ? DSI1_STAT_PHY_D2_STOP : 0) | in vc4_dsi_ulps()
692 (dsi->lanes > 3 ? DSI1_STAT_PHY_D3_STOP : 0)); in vc4_dsi_ulps()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/pinctrl/ |
| D | nvidia,tegra124-xusb-padctl.txt | 10 The Tegra XUSB pad controller manages a set of lanes, each of which can be
40 Each subnode describes groups of lanes along with parameters and pads that
54 - nvidia,lanes: An array of strings. Each string is the name of a lane.
62 Note that not all of these properties are valid for all lanes. Lanes can be
117 nvidia,lanes = "pcie-0", "pcie-1";
123 nvidia,lanes = "pcie-2", "pcie-3",
130 nvidia,lanes = "sata-0";
|
| /Linux-v5.4/Documentation/devicetree/bindings/display/panel/ |
| D | raydium,rm67191.txt | 7 - dsi-lanes: number of DSI lanes to be used
32 dsi-lanes = <4>;
|
