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Searched refs:kiq_ring (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.c470 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kcq() local
476 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size * in amdgpu_gfx_disable_kcq()
481 kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], in amdgpu_gfx_disable_kcq()
484 return amdgpu_ring_test_ring(kiq_ring); in amdgpu_gfx_disable_kcq()
490 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in amdgpu_gfx_enable_kcq() local
512 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe, in amdgpu_gfx_enable_kcq()
513 kiq_ring->queue); in amdgpu_gfx_enable_kcq()
515 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size * in amdgpu_gfx_enable_kcq()
523 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask); in amdgpu_gfx_enable_kcq()
525 kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); in amdgpu_gfx_enable_kcq()
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Damdgpu_gfx.h67 void (*kiq_set_resources)(struct amdgpu_ring *kiq_ring,
69 void (*kiq_map_queues)(struct amdgpu_ring *kiq_ring,
71 void (*kiq_unmap_queues)(struct amdgpu_ring *kiq_ring,
75 void (*kiq_query_status)(struct amdgpu_ring *kiq_ring,
Dgfx_v10_0.c257 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx10_kiq_set_resources() argument
259 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx10_kiq_set_resources()
260 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx10_kiq_set_resources()
262 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx10_kiq_set_resources()
263 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx10_kiq_set_resources()
264 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx10_kiq_set_resources()
265 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx10_kiq_set_resources()
266 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx10_kiq_set_resources()
267 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx10_kiq_set_resources()
270 static void gfx10_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx10_kiq_map_queues() argument
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Dgfx_v9_0.c3346 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v9_0_kiq_kcq_enable() local
3365 r = amdgpu_ring_alloc(kiq_ring, (7 * adev->gfx.num_compute_rings) + 8); in gfx_v9_0_kiq_kcq_enable()
3372 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_0_kiq_kcq_enable()
3373 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx_v9_0_kiq_kcq_enable()
3375 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v9_0_kiq_kcq_enable()
3376 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v9_0_kiq_kcq_enable()
3377 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v9_0_kiq_kcq_enable()
3378 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v9_0_kiq_kcq_enable()
3379 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v9_0_kiq_kcq_enable()
3380 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_kcq_enable()
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Dgfx_v8_0.c4377 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_kcq_enable() local
4396 r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); in gfx_v8_0_kiq_kcq_enable()
4402 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v8_0_kiq_kcq_enable()
4403 amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */ in gfx_v8_0_kiq_kcq_enable()
4404 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable()
4405 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable()
4406 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable()
4407 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable()
4408 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable()
4409 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable()
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