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Searched refs:ixLCAC_MC0_CNTL (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/include/asic_reg/smu/
Dsmu_6_0_d.h26 #define ixLCAC_MC0_CNTL 0x011C macro
Dsmu_8_0_d.h632 #define ixLCAC_MC0_CNTL 0xd0208130 macro
Dsmu_7_0_0_d.h725 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
Dsmu_7_1_1_d.h1025 #define ixLCAC_MC0_CNTL 0xc0400130 macro
Dsmu_7_0_1_d.h1214 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
Dsmu_7_1_2_d.h1175 #define ixLCAC_MC0_CNTL 0xc0400130 macro
Dsmu_7_1_3_d.h1107 #define ixLCAC_MC0_CNTL 0xc0400130 macro
Dsmu_7_1_0_d.h1244 #define ixLCAC_MC0_CNTL 0xc0400d30 macro
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu7_hwmgr.c1120 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x5); in smu7_enable_sclk_mclk_dpm()
1125 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400009); in smu7_enable_sclk_mclk_dpm()
1128 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixLCAC_MC0_CNTL, 0x400005); in smu7_enable_sclk_mclk_dpm()