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Searched refs:irq_enable_mask (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.4/arch/mips/sgi-ip27/
Dip27-irq.c33 static DEFINE_PER_CPU(unsigned long [2], irq_enable_mask);
53 unsigned long *mask = per_cpu(irq_enable_mask, hd->cpu); in enable_hub_irq()
63 unsigned long *mask = per_cpu(irq_enable_mask, hd->cpu); in disable_hub_irq()
186 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in ip27_do_irq_mask0()
228 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in ip27_do_irq_mask1()
253 unsigned long *mask = per_cpu(irq_enable_mask, cpu); in install_ipi()
/Linux-v5.4/drivers/gpu/drm/via/
Dvia_irq.c268 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE; in via_driver_irq_preinstall()
287 dev_priv->irq_enable_mask |= cur_irq->enable_mask; in via_driver_irq_preinstall()
299 ~(dev_priv->irq_enable_mask)); in via_driver_irq_preinstall()
317 | dev_priv->irq_enable_mask); in via_driver_irq_postinstall()
341 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask)); in via_driver_irq_uninstall()
Dvia_drv.h97 uint32_t irq_enable_mask; member
/Linux-v5.4/drivers/gpu/drm/i915/gt/
Dintel_ringbuffer.c987 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask); in gen5_irq_enable()
993 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask); in gen5_irq_disable()
999 engine->i915->irq_mask &= ~engine->irq_enable_mask; in i9xx_irq_enable()
1007 engine->i915->irq_mask |= engine->irq_enable_mask; in i9xx_irq_disable()
1016 i915->irq_mask &= ~engine->irq_enable_mask; in i8xx_irq_enable()
1026 i915->irq_mask |= engine->irq_enable_mask; in i8xx_irq_disable()
1049 ~(engine->irq_enable_mask | engine->irq_keep_mask)); in gen6_irq_enable()
1054 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask); in gen6_irq_enable()
1061 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask); in gen6_irq_disable()
1067 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask); in hsw_vebox_irq_enable()
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Dintel_engine_types.h403 u32 irq_enable_mask; /* bitmask to enable ring interrupt */ member
Dintel_lrc.c2719 ~(engine->irq_enable_mask | engine->irq_keep_mask)); in gen8_logical_ring_enable_irq()
3065 engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift; in logical_ring_default_irqs()
/Linux-v5.4/arch/mips/include/asm/mach-loongson64/
Dmmzone.h25 unsigned long irq_enable_mask[2]; member
/Linux-v5.4/drivers/pinctrl/
Dpinctrl-single.c138 unsigned irq_enable_mask; member
671 if (pcs_soc->irq_enable_mask) { in pcs_add_pin()
675 if (val & pcs_soc->irq_enable_mask) { in pcs_add_pin()
678 val &= ~pcs_soc->irq_enable_mask; in pcs_add_pin()
1381 soc_mask = pcs_soc->irq_enable_mask; in pcs_irq_set()
1553 if (!pcs_soc->irq_enable_mask || in pcs_irq_init_chained_handler()
1916 .irq_enable_mask = (1 << 14), /* OMAP_WAKEUP_EN */
1921 .irq_enable_mask = (1 << 24), /* WAKEUPENABLE */
1927 .irq_enable_mask = (1 << 29), /* OMAP_WAKEUP_EN */
/Linux-v5.4/drivers/dma/ti/
Domap-dma.c37 uint32_t irq_enable_mask; member
604 status &= od->irq_enable_mask; in omap_dma_irq()
662 od->irq_enable_mask |= val; in omap_dma_alloc_chan_resources()
663 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_alloc_chan_resources()
697 od->irq_enable_mask &= ~BIT(c->dma_ch); in omap_dma_free_chan_resources()
698 omap_dma_glbl_write(od, IRQENABLE_L1, od->irq_enable_mask); in omap_dma_free_chan_resources()
1555 od->irq_enable_mask = 0; in omap_dma_probe()