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/Linux-v5.4/Documentation/devicetree/bindings/interconnect/
Dinterconnect.txt4 The purpose of this document is to define a common set of generic interconnect
8 = interconnect providers =
10 The interconnect provider binding is intended to represent the interconnect
11 controllers in the system. Each provider registers a set of interconnect
12 nodes, which expose the interconnect related capabilities of the interconnect
14 etc. The consumer drivers set constraints on interconnect path (or endpoints)
15 depending on the use case. Interconnect providers can also be interconnect
20 - compatible : contains the interconnect provider compatible string
21 - #interconnect-cells : number of cells in a interconnect specifier needed to
22 encode the interconnect node id
[all …]
Dqcom,qcs404.txt1 Qualcomm QCS404 Network-On-Chip interconnect driver binding
9 - #interconnect-cells : should contain 1
12 clocks : list of phandles and specifiers to all interconnect bus clocks
19 bimc: interconnect@400000 {
22 #interconnect-cells = <1>;
28 pnoc: interconnect@500000 {
31 #interconnect-cells = <1>;
37 snoc: interconnect@580000 {
40 #interconnect-cells = <1>;
Dqcom,sdm845.txt1 Qualcomm SDM845 Network-On-Chip interconnect driver binding
4 SDM845 interconnect providers support system bandwidth requirements through
14 - #interconnect-cells : should contain 1
19 rsc_hlos: interconnect {
21 #interconnect-cells = <1>;
/Linux-v5.4/Documentation/driver-api/
Dinterconnect.rst16 The interconnect bus is hardware with configurable parameters, which can be
18 An example of interconnect buses are the interconnects between various
22 Below is a simplified diagram of a real-world SoC interconnect bus topology.
55 Interconnect provider is the software definition of the interconnect hardware.
56 The interconnect providers on the above diagram are M NoC, S NoC, C NoC, P NoC
59 Interconnect node is the software definition of the interconnect hardware
60 port. Each interconnect provider consists of multiple interconnect nodes,
61 which are connected to other SoC components including other interconnect
63 called an interconnect node, which belongs to the Mem NoC interconnect provider.
70 include multiple master-slave pairs across several interconnect providers.
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/bus/
Dti-sysc.txt1 Texas Instruments sysc interconnect target module wrapper binding
3 Texas Instruments SoCs can have a generic interconnect target module
5 interconnect (Arteris NoC) and L4 interconnect (Sonics s3220). The sysc
8 of the interconnect.
10 Each interconnect target module can have one or more devices connected to
11 it. There is a set of control registers for managing interconnect target
12 module clocks, idle modes and interconnect level resets for the module.
15 space of the first child device IP block managed by the interconnect
42 - reg shall have register areas implemented for the interconnect
46 interconnect target module in question such as
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/Linux-v5.4/Documentation/devicetree/bindings/arm/sunxi/
Dsunxi-mbus.txt14 - #interconnect-cells: Must be one, with the argument being the MBUS
18 interconnects and interconnect-names properties set to the MBUS
19 controller and with "dma-mem" as the interconnect name.
28 #interconnect-cells = <1>;
35 interconnect-names = "dma-mem";
/Linux-v5.4/drivers/interconnect/qcom/
DKconfig3 bool "Qualcomm Network-on-Chip interconnect drivers"
6 Support for Qualcomm's Network-on-Chip interconnect hardware.
9 tristate "Qualcomm QCS404 interconnect driver"
18 tristate "Qualcomm SDM845 interconnect driver"
/Linux-v5.4/Documentation/devicetree/bindings/arm/omap/
Dl4.txt1 L4 interconnect bindings
3 These bindings describe the OMAP SoCs L4 interconnect bus.
19 - reg : registers link agent and interconnect agent and access protection
21 interconnect agent instances, "ap" for access if it exists
25 l4: interconnect@48000000 {
/Linux-v5.4/Documentation/devicetree/bindings/arm/
Dcci.txt2 ARM CCI cache coherent interconnect binding description
6 cache coherent interconnect (CCI) that is capable of monitoring bus
14 * CCI interconnect node
20 through the CCI interconnect is the same as the one seen from the
51 CCI interconnect node can define the following child nodes:
56 Parent node must be CCI interconnect node.
85 Parent node must be CCI interconnect node.
124 * CCI interconnect bus masters
129 A CCI interconnect bus master node must contain the following
/Linux-v5.4/Documentation/devicetree/bindings/display/msm/
Ddpu.txt31 - interconnects : interconnect path specifier for MDSS according to
32 Documentation/devicetree/bindings/interconnect/interconnect.txt. Should be
34 - interconnect-names : MDSS will have 2 port names to differentiate between the
35 2 interconnect paths defined with interconnect specifier.
97 interconnect-names = "mdp0-mem", "mdp1-mem";
Dgpu.txt25 - interconnects: optional phandle to an interconnect provider. See
26 ../interconnect/interconnect.txt for details.
/Linux-v5.4/Documentation/devicetree/bindings/arm/stm32/
Dmlahb.txt1 ML-AHB interconnect bindings
3 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects
22 The Cortex-M remote processor accessed via the mlahb interconnect is described
/Linux-v5.4/arch/arm/boot/dts/
Dam33xx.dtsi157 * XXX: Use a flat representation of the AM33XX interconnect.
158 * The real AM33XX interconnect network is quite complex. Since
170 l4_wkup: interconnect@44c00000 {
180 l4_per: interconnect@48000000 {
182 l4_fw: interconnect@47c00000 {
184 l4_fast: interconnect@4a000000 {
186 l4_mpuss: interconnect@4b140000 {
Domap4.dtsi121 * XXX: Use a flat representation of the OMAP4 interconnect.
122 * The real OMAP interconnect network is quite complex.
139 l4_wkup: interconnect@4a300000 {
142 l4_cfg: interconnect@4a000000 {
145 l4_per: interconnect@48000000 {
148 l4_abe: interconnect@40100000 {
Domap5.dtsi135 * XXX: Use a flat representation of the OMAP3 interconnect.
136 * The real OMAP interconnect network is quite complex.
153 l4_wkup: interconnect@4ae00000 {
156 l4_cfg: interconnect@4a000000 {
159 l4_per: interconnect@48000000 {
162 l4_abe: interconnect@40100000 {
Ddra7.dtsi140 * XXX: Use a flat representation of the SOC interconnect.
141 * The real OMAP interconnect network is quite complex.
157 l4_cfg: interconnect@4a000000 {
159 l4_wkup: interconnect@4ae00000 {
161 l4_per1: interconnect@48000000 {
163 l4_per2: interconnect@48400000 {
165 l4_per3: interconnect@48800000 {
Ddra62x-clocks.dtsi18 /* Compared to dm814x, dra62x has interconnect clocks on isp PLL */
Domap4-mcpdm.dtsi32 * McPDM pads must be muxed at the interconnect target module
Dam4372.dtsi163 l4_wkup: interconnect@44c00000 {
173 l4_per: interconnect@48000000 {
175 l4_fast: interconnect@4a000000 {
/Linux-v5.4/arch/arm64/boot/dts/ti/
Dk3-am65.dtsi63 cbass_main: interconnect@100000 {
85 cbass_mcu: interconnect@28380000 {
99 cbass_wakeup: interconnect@42040000 {
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dti-clkctrl.txt4 interconnect target module. The clkctrl clock controller manages functional
8 interconnect target module on omap4 and later variants.
/Linux-v5.4/drivers/interconnect/
DKconfig14 source "drivers/interconnect/qcom/Kconfig"
/Linux-v5.4/drivers/bus/
DKconfig21 interconnect for ARM platforms.
83 Driver to enable OMAP interconnect error handling driver.
154 bool "TI sysc interconnect target module driver"
157 Generic driver for Texas Instruments interconnect target module
/Linux-v5.4/Documentation/devicetree/bindings/sound/
Domap-dmic.txt7 <L3 interconnect address, size>;
Domap-mcpdm.txt7 <L3 interconnect address, size>;

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