Searched refs:indexing (Results 1 – 25 of 40) sorted by relevance
12
294 synth->indexing.currindex++; in synth_insert_next_index()296 if (synth->indexing.currindex > in synth_insert_next_index()297 synth->indexing.highindex) in synth_insert_next_index()298 synth->indexing.currindex = in synth_insert_next_index()299 synth->indexing.lowindex; in synth_insert_next_index()302 out = synth->indexing.currindex * 10 + sent_num; in synth_insert_next_index()303 synth_printf(synth->indexing.command, out, out); in synth_insert_next_index()314 if ((ind / 10) <= synth->indexing.currindex) in spk_get_index_count()315 index_count = synth->indexing.currindex - (ind / 10); in spk_get_index_count()317 index_count = synth->indexing.currindex in spk_get_index_count()[all …]
101 .indexing = {
104 .indexing = {
100 .indexing = {
106 .indexing = {
108 .indexing = {
115 .indexing = {
194 struct synth_indexing indexing; member
128 .indexing = {
113 .indexing = {
109 .indexing = {
134 .indexing = {
118 .indexing = {
222 .indexing = {
42 specified in order of their indexing by the SMMU.80 property is not valid for SMMUs using stream indexing,112 /* SMMU with stream matching or stream indexing */
8 a btree for indexing and the layout is optimized for SSDs.
27 4) MPEG indexing is not yet implemented.
60 enum cache_indexing indexing; member
358 tcache->cache_attrs.indexing = NODE_CACHE_DIRECT_MAP; in hmat_parse_cache()361 tcache->cache_attrs.indexing = NODE_CACHE_INDEXED; in hmat_parse_cache()365 tcache->cache_attrs.indexing = NODE_CACHE_OTHER; in hmat_parse_cache()
153 What: /sys/devices/system/node/nodeX/memory_side_cache/indexY/indexing157 The caches associativity indexing: 0 for direct mapped,
23 into the register, instead indexing begins at 1. The optional property
17 The number of bits in the key segment used for indexing into the21 The position (in the key) of the key segment used for indexing into
208 The GPIO controller base in the global pin indexing space is pin 48, thus210 indexing space.
149 | |-- indexing154 The "indexing" will be 0 if it is a direct-mapped cache, and non-zero
