Searched refs:imx_clk_gate2_shared2 (Results  1 – 4 of 4) sorted by relevance
| /Linux-v5.4/drivers/clk/imx/ | 
| D | clk-imx8mm.c | 587 …clks[IMX8MM_CLK_NAND_ROOT] = imx_clk_gate2_shared2("nand_root_clk", "nand", base + 0x4300, 0, &sha…  in imx8mm_clocks_probe()588 …clks[IMX8MM_CLK_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_usdhc_rawnand_clk", "nan…  in imx8mm_clocks_probe()
 589 …clks[IMX8MM_CLK_SAI1_ROOT] = imx_clk_gate2_shared2("sai1_root_clk", "sai1", base + 0x4330, 0, &sha…  in imx8mm_clocks_probe()
 590 …clks[IMX8MM_CLK_SAI1_IPG] = imx_clk_gate2_shared2("sai1_ipg_clk", "ipg_audio_root", base + 0x4330,…  in imx8mm_clocks_probe()
 591 …clks[IMX8MM_CLK_SAI2_ROOT] = imx_clk_gate2_shared2("sai2_root_clk", "sai2", base + 0x4340, 0, &sha…  in imx8mm_clocks_probe()
 592 …clks[IMX8MM_CLK_SAI2_IPG] = imx_clk_gate2_shared2("sai2_ipg_clk", "ipg_audio_root", base + 0x4340,…  in imx8mm_clocks_probe()
 593 …clks[IMX8MM_CLK_SAI3_ROOT] = imx_clk_gate2_shared2("sai3_root_clk", "sai3", base + 0x4350, 0, &sha…  in imx8mm_clocks_probe()
 594 …clks[IMX8MM_CLK_SAI3_IPG] = imx_clk_gate2_shared2("sai3_ipg_clk", "ipg_audio_root", base + 0x4350,…  in imx8mm_clocks_probe()
 595 …clks[IMX8MM_CLK_SAI4_ROOT] = imx_clk_gate2_shared2("sai4_root_clk", "sai4", base + 0x4360, 0, &sha…  in imx8mm_clocks_probe()
 596 …clks[IMX8MM_CLK_SAI4_IPG] = imx_clk_gate2_shared2("sai4_ipg_clk", "ipg_audio_root", base + 0x4360,…  in imx8mm_clocks_probe()
 [all …]
 
 | 
| D | clk-imx8mq.c | 508 …clks[IMX8MQ_CLK_RAWNAND_ROOT] = imx_clk_gate2_shared2("nand_root_clk", "nand", base + 0x4300, 0, &…  in imx8mq_clocks_probe()509 …clks[IMX8MQ_CLK_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_usdhc_rawnand_clk", "nan…  in imx8mq_clocks_probe()
 510 …clks[IMX8MQ_CLK_SAI1_ROOT] = imx_clk_gate2_shared2("sai1_root_clk", "sai1", base + 0x4330, 0, &sha…  in imx8mq_clocks_probe()
 511 …clks[IMX8MQ_CLK_SAI1_IPG] = imx_clk_gate2_shared2("sai1_ipg_clk", "ipg_audio_root", base + 0x4330,…  in imx8mq_clocks_probe()
 512 …clks[IMX8MQ_CLK_SAI2_ROOT] = imx_clk_gate2_shared2("sai2_root_clk", "sai2", base + 0x4340, 0, &sha…  in imx8mq_clocks_probe()
 513 …clks[IMX8MQ_CLK_SAI2_IPG] = imx_clk_gate2_shared2("sai2_ipg_clk", "ipg_root", base + 0x4340, 0, &s…  in imx8mq_clocks_probe()
 514 …clks[IMX8MQ_CLK_SAI3_ROOT] = imx_clk_gate2_shared2("sai3_root_clk", "sai3", base + 0x4350, 0, &sha…  in imx8mq_clocks_probe()
 515 …clks[IMX8MQ_CLK_SAI3_IPG] = imx_clk_gate2_shared2("sai3_ipg_clk", "ipg_root", base + 0x4350, 0, &s…  in imx8mq_clocks_probe()
 516 …clks[IMX8MQ_CLK_SAI4_ROOT] = imx_clk_gate2_shared2("sai4_root_clk", "sai4", base + 0x4360, 0, &sha…  in imx8mq_clocks_probe()
 517 …clks[IMX8MQ_CLK_SAI4_IPG] = imx_clk_gate2_shared2("sai4_ipg_clk", "ipg_audio_root", base + 0x4360,…  in imx8mq_clocks_probe()
 [all …]
 
 | 
| D | clk-imx8mn.c | 571 …clks[IMX8MN_CLK_NAND_ROOT] = imx_clk_gate2_shared2("nand_root_clk", "nand", base + 0x4300, 0, &sha…  in imx8mn_clocks_probe()572 …clks[IMX8MN_CLK_NAND_USDHC_BUS_RAWNAND_CLK] = imx_clk_gate2_shared2("nand_usdhc_rawnand_clk", "nan…  in imx8mn_clocks_probe()
 573 …clks[IMX8MN_CLK_SAI2_ROOT] = imx_clk_gate2_shared2("sai2_root_clk", "sai2", base + 0x4340, 0, &sha…  in imx8mn_clocks_probe()
 574 …clks[IMX8MN_CLK_SAI2_IPG] = imx_clk_gate2_shared2("sai2_ipg_clk", "ipg_audio_root", base + 0x4340,…  in imx8mn_clocks_probe()
 575 …clks[IMX8MN_CLK_SAI3_ROOT] = imx_clk_gate2_shared2("sai3_root_clk", "sai3", base + 0x4350, 0, &sha…  in imx8mn_clocks_probe()
 576 …clks[IMX8MN_CLK_SAI3_IPG] = imx_clk_gate2_shared2("sai3_ipg_clk", "ipg_audio_root", base + 0x4350,…  in imx8mn_clocks_probe()
 577 …clks[IMX8MN_CLK_SAI5_ROOT] = imx_clk_gate2_shared2("sai5_root_clk", "sai5", base + 0x4370, 0, &sha…  in imx8mn_clocks_probe()
 578 …clks[IMX8MN_CLK_SAI5_IPG] = imx_clk_gate2_shared2("sai5_ipg_clk", "ipg_audio_root", base + 0x4370,…  in imx8mn_clocks_probe()
 579 …clks[IMX8MN_CLK_SAI6_ROOT] = imx_clk_gate2_shared2("sai6_root_clk", "sai6", base + 0x4380, 0, &sha…  in imx8mn_clocks_probe()
 580 …clks[IMX8MN_CLK_SAI6_IPG] = imx_clk_gate2_shared2("sai6_ipg_clk", "ipg_audio_root", base + 0x4380,…  in imx8mn_clocks_probe()
 [all …]
 
 | 
| D | clk.h | 85 #define imx_clk_gate2_shared2(name, parent, reg, shift, share_count) \  macro
 |