| /Linux-v5.4/drivers/gpu/drm/i915/ |
| D | intel_uncore.h | 81 i915_reg_t r); 83 i915_reg_t r); 86 i915_reg_t r, bool trace); 88 i915_reg_t r, bool trace); 90 i915_reg_t r, bool trace); 92 i915_reg_t r, bool trace); 95 i915_reg_t r, u8 val, bool trace); 97 i915_reg_t r, u16 val, bool trace); 99 i915_reg_t r, u32 val, bool trace); 204 i915_reg_t reg, unsigned int op); [all …]
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| D | i915_irq.h | 136 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr, 137 i915_reg_t iir, i915_reg_t ier); 142 i915_reg_t imr, u32 imr_val, 143 i915_reg_t ier, u32 ier_val, 144 i915_reg_t iir);
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| D | intel_uncore.c | 914 static const i915_reg_t gen8_shadowed_regs[] = { 924 static const i915_reg_t gen11_shadowed_regs[] = { 938 static int mmio_reg_cmp(u32 key, const i915_reg_t *reg) in mmio_reg_cmp() 953 const i915_reg_t *regs = gen##x##_shadowed_regs; \ 962 gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) in gen6_reg_write_fw_domains() 1094 const i915_reg_t reg, in __unclaimed_reg_debug() 1108 const i915_reg_t reg, in unclaimed_reg_debug() 1137 gen2_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ 1145 gen5_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ 1210 func##_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \ [all …]
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| D | intel_pm.h | 78 u64 intel_rc6_residency_ns(struct drm_i915_private *dev_priv, i915_reg_t reg); 79 u64 intel_rc6_residency_us(struct drm_i915_private *dev_priv, i915_reg_t reg);
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| /Linux-v5.4/drivers/gpu/drm/i915/display/ |
| D | intel_sdvo.h | 19 i915_reg_t sdvo_reg, enum pipe *pipe); 21 i915_reg_t reg, enum port port);
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| D | intel_dvo_dev.h | 36 i915_reg_t dvo_reg; 37 i915_reg_t dvo_srcdim_reg;
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| D | intel_display_power.h | 153 i915_reg_t bios; 154 i915_reg_t driver; 155 i915_reg_t kvmr; 156 i915_reg_t debug;
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| D | intel_dvo.c | 192 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_disable_dvo() 206 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_enable_dvo() 285 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_dvo_pre_enable() 286 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; in intel_dvo_pre_enable() 399 static enum port intel_dvo_port(i915_reg_t dvo_reg) in intel_dvo_port()
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| D | intel_dp.h | 39 i915_reg_t dp_reg, enum port port, 41 bool intel_dp_init(struct drm_i915_private *dev_priv, i915_reg_t output_reg,
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| D | intel_crt.h | 17 i915_reg_t adpa_reg, enum pipe *pipe);
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| D | intel_lvds.h | 17 i915_reg_t lvds_reg, enum pipe *pipe);
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| D | intel_hdmi.h | 27 void intel_hdmi_init(struct drm_i915_private *dev_priv, i915_reg_t hdmi_reg,
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| D | intel_hdmi.c | 165 static i915_reg_t 283 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe() 338 i915_reg_t reg = TVIDEO_DIP_CTL(pipe); in ibx_infoframes_enabled() 360 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe() 436 i915_reg_t reg = VLV_TVIDEO_DIP_CTL(intel_crtc->pipe); in vlv_write_infoframe() 512 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); in hsw_write_infoframe() 843 i915_reg_t reg = VIDEO_DIP_CTL; in g4x_set_infoframes() 952 i915_reg_t reg; in intel_hdmi_set_gcp_infoframe() 977 i915_reg_t reg; in intel_hdmi_read_gcp_infoframe() 1026 i915_reg_t reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_set_infoframes() [all …]
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| D | intel_fifo_underrun.c | 93 i915_reg_t reg = PIPESTAT(crtc->pipe); in i9xx_check_fifo_underruns() 114 i915_reg_t reg = PIPESTAT(pipe); in i9xx_set_fifo_underrun_reporting()
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| /Linux-v5.4/drivers/gpu/drm/i915/selftests/ |
| D | intel_uncore.c | 65 const i915_reg_t *regs; in intel_shadow_table_check() 71 const i915_reg_t *reg; in intel_shadow_table_check() 190 i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset); in live_forcewake_ops() 282 i915_reg_t reg = { offset }; in live_forcewake_domains() 293 i915_reg_t reg = { offset }; in live_forcewake_domains()
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| D | mock_uncore.c | 29 nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { } 36 nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; }
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/ |
| D | intel_gt_pm_irq.c | 18 i915_reg_t reg; in write_pm_imr() 65 i915_reg_t reg = INTEL_GEN(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir() 79 i915_reg_t reg; in write_pm_ier()
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| D | intel_gt.c | 32 static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set) in rmw_set() 37 static void rmw_clear(struct intel_uncore *uncore, i915_reg_t reg, u32 clr) in rmw_clear() 42 static void clear_register(struct intel_uncore *uncore, i915_reg_t reg) in clear_register() 123 i915_reg_t fault_reg, fault_data0_reg, fault_data1_reg; in gen8_check_faults()
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| D | intel_workarounds_types.h | 15 i915_reg_t reg;
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| D | selftest_workarounds.c | 158 i915_reg_t reg = i < engine->whitelist.count ? in get_whitelist_reg() 869 i915_reg_t reg; 874 i915_reg_t reg, in find_reg() 890 static bool pardon_reg(struct drm_i915_private *i915, i915_reg_t reg) in pardon_reg() 902 u32 a, u32 b, i915_reg_t reg) in result_eq() 913 static bool writeonly_reg(struct drm_i915_private *i915, i915_reg_t reg) in writeonly_reg() 924 u32 a, u32 b, i915_reg_t reg) in result_neq() 941 i915_reg_t reg)) in check_whitelisted_registers()
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| D | intel_reset.c | 30 static void rmw_set_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 set) in rmw_set_fw() 35 static void rmw_clear_fw(struct intel_uncore *uncore, i915_reg_t reg, u32 clr) in rmw_clear_fw() 314 i915_reg_t sfc_forced_lock, sfc_forced_lock_ack; in gen11_lock_sfc() 316 i915_reg_t sfc_usage; in gen11_lock_sfc() 381 i915_reg_t sfc_forced_lock; in gen11_unlock_sfc() 447 const i915_reg_t reg = RING_RESET_CTL(engine->mmio_base); in gen8_engine_reset_prepare()
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| D | intel_workarounds.c | 149 wa_write_masked_or(struct i915_wa_list *wal, i915_reg_t reg, u32 mask, in wa_write_masked_or() 163 wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) in wa_masked_en() 169 wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 val) in wa_write() 175 wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 val) in wa_write_or() 1034 whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags) in whitelist_reg_ext() 1051 whitelist_reg(struct i915_wa_list *wal, i915_reg_t reg) in whitelist_reg()
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| /Linux-v5.4/drivers/gpu/drm/i915/gvt/ |
| D | mmio_context.h | 41 i915_reg_t reg;
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| D | mmio_context.c | 162 i915_reg_t offset; in load_render_mocs() 354 i915_reg_t reg; in handle_tlb_pending_event() 395 i915_reg_t offset, l3_offset; in switch_mocs()
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| /Linux-v5.4/drivers/gpu/drm/i915/gt/uc/ |
| D | intel_huc.h | 21 i915_reg_t reg;
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