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Searched refs:hwirq (Results 1 – 25 of 323) sorted by relevance

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/Linux-v5.4/arch/powerpc/sysdev/
Dmpic_u3msi.c61 static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) in find_ht_magic_addr() argument
75 static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) in find_u4_magic_addr() argument
97 return 0xf8004000 | (hwirq << 4); in find_u4_magic_addr()
105 irq_hw_number_t hwirq; in u3msi_teardown_msi_irqs() local
111 hwirq = virq_to_hw(entry->irq); in u3msi_teardown_msi_irqs()
114 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); in u3msi_teardown_msi_irqs()
126 int hwirq; in u3msi_setup_msi_irqs() local
140 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); in u3msi_setup_msi_irqs()
141 if (hwirq < 0) { in u3msi_setup_msi_irqs()
143 return hwirq; in u3msi_setup_msi_irqs()
[all …]
/Linux-v5.4/drivers/irqchip/
Dirq-sifive-plic.c73 int hwirq, int enable) in plic_toggle() argument
75 u32 __iomem *reg = handler->enable_base + (hwirq / 32) * sizeof(u32); in plic_toggle()
76 u32 hwirq_mask = 1 << (hwirq % 32); in plic_toggle()
87 int hwirq, int enable) in plic_irq_toggle() argument
91 writel(enable, plic_regs + PRIORITY_BASE + hwirq * PRIORITY_PER_ID); in plic_irq_toggle()
96 plic_toggle(handler, hwirq, enable); in plic_irq_toggle()
106 plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); in plic_irq_unmask()
111 plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); in plic_irq_mask()
128 plic_irq_toggle(cpu_possible_mask, d->hwirq, 0); in plic_set_affinity()
129 plic_irq_toggle(cpumask_of(cpu), d->hwirq, 1); in plic_set_affinity()
[all …]
Dirq-or1k-pic.c28 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask()
33 mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); in or1k_pic_unmask()
38 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_ack()
43 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask_ack()
44 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_mask_ack()
55 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_ack()
60 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
61 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
103 int hwirq; in pic_get_irq() local
105 hwirq = ffs(mfspr(SPR_PICSR) >> first); in pic_get_irq()
[all …]
Dirq-ativic32.c17 __nds32__mtsr_dsb(BIT(data->hwirq), NDS32_SR_INT_PEND2); in ativic32_ack_irq()
23 __nds32__mtsr_dsb(int_mask2 & (~(BIT(data->hwirq))), NDS32_SR_INT_MASK2); in ativic32_mask_irq()
29 __nds32__mtsr_dsb(int_mask2 | (BIT(data->hwirq)), NDS32_SR_INT_MASK2); in ativic32_unmask_irq()
36 u32 bit = 1 << data->hwirq; in nointc_set_wake()
40 __assign_bit(data->hwirq, &irq_orig_bit, true); in nointc_set_wake()
42 __assign_bit(data->hwirq, &irq_orig_bit, false); in nointc_set_wake()
44 __assign_bit(data->hwirq, &int_mask, true); in nointc_set_wake()
45 __assign_bit(data->hwirq, &wake_mask, true); in nointc_set_wake()
49 __assign_bit(data->hwirq, &int_mask, false); in nointc_set_wake()
51 __assign_bit(data->hwirq, &wake_mask, false); in nointc_set_wake()
[all …]
Dirq-ti-sci-intr.c24 #define HWIRQ_TO_DEVID(hwirq) (((hwirq) >> (TI_SCI_DEV_ID_SHIFT)) & \ argument
26 #define HWIRQ_TO_IRQID(hwirq) ((hwirq) & (TI_SCI_IRQ_ID_MASK)) argument
68 unsigned long *hwirq, in ti_sci_intr_irq_domain_translate() argument
76 *hwirq = TO_HWIRQ(fwspec->param[0], fwspec->param[1]); in ti_sci_intr_irq_domain_translate()
97 irq_index = HWIRQ_TO_IRQID(data->hwirq); in ti_sci_intr_irq_domain_free()
98 dev_id = HWIRQ_TO_DEVID(data->hwirq); in ti_sci_intr_irq_domain_free()
101 intr->dst_id, parent_data->hwirq); in ti_sci_intr_irq_domain_free()
102 ti_sci_release_resource(intr->dst_irq, parent_data->hwirq); in ti_sci_intr_irq_domain_free()
116 unsigned int virq, u32 hwirq) in ti_sci_intr_alloc_gic_irq() argument
124 dev_id = HWIRQ_TO_DEVID(hwirq); in ti_sci_intr_alloc_gic_irq()
[all …]
Dirq-mvebu-sei.c59 u32 reg_idx = SEI_IRQ_REG_IDX(d->hwirq); in mvebu_sei_ack_irq()
61 writel_relaxed(BIT(SEI_IRQ_REG_BIT(d->hwirq)), in mvebu_sei_ack_irq()
68 u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq); in mvebu_sei_mask_irq()
74 reg |= BIT(SEI_IRQ_REG_BIT(d->hwirq)); in mvebu_sei_mask_irq()
82 u32 reg, reg_idx = SEI_IRQ_REG_IDX(d->hwirq); in mvebu_sei_unmask_irq()
88 reg &= ~BIT(SEI_IRQ_REG_BIT(d->hwirq)); in mvebu_sei_unmask_irq()
144 msg->data = data->hwirq + sei->caps->cp_range.first; in mvebu_sei_cp_compose_msi_msg()
199 unsigned long *hwirq, in mvebu_sei_ap_translate() argument
202 *hwirq = fwspec->param[0]; in mvebu_sei_ap_translate()
213 unsigned long hwirq; in mvebu_sei_ap_alloc() local
[all …]
Dirq-ixp4xx.c78 if (ixi->is_356 && d->hwirq >= 32) { in ixp4xx_irq_mask()
80 val &= ~BIT(d->hwirq - 32); in ixp4xx_irq_mask()
84 val &= ~BIT(d->hwirq); in ixp4xx_irq_mask()
98 if (ixi->is_356 && d->hwirq >= 32) { in ixp4xx_irq_unmask()
100 val |= BIT(d->hwirq - 32); in ixp4xx_irq_unmask()
104 val |= BIT(d->hwirq); in ixp4xx_irq_unmask()
131 unsigned long *hwirq, in ixp4xx_irq_domain_translate() argument
136 *hwirq = fwspec->param[0]; in ixp4xx_irq_domain_translate()
144 *hwirq = fwspec->param[0]; in ixp4xx_irq_domain_translate()
158 irq_hw_number_t hwirq; in ixp4xx_irq_domain_alloc() local
[all …]
Dirq-mbigen.c67 static inline unsigned int get_mbigen_vec_reg(irq_hw_number_t hwirq) in get_mbigen_vec_reg() argument
71 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_vec_reg()
72 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; in get_mbigen_vec_reg()
73 pin = hwirq % IRQS_PER_MBIGEN_NODE; in get_mbigen_vec_reg()
79 static inline void get_mbigen_type_reg(irq_hw_number_t hwirq, in get_mbigen_type_reg() argument
84 hwirq -= RESERVED_IRQ_PER_MBIGEN_CHIP; in get_mbigen_type_reg()
85 nid = hwirq / IRQS_PER_MBIGEN_NODE + 1; in get_mbigen_type_reg()
86 irq_ofst = hwirq % IRQS_PER_MBIGEN_NODE; in get_mbigen_type_reg()
95 static inline void get_mbigen_clear_reg(irq_hw_number_t hwirq, in get_mbigen_clear_reg() argument
98 unsigned int ofst = (hwirq / 32) * 4; in get_mbigen_clear_reg()
[all …]
Dirq-partition-percpu.c26 unsigned int cpu, unsigned int hwirq) in partition_check_cpu() argument
28 return cpumask_test_cpu(cpu, &part->parts[hwirq].mask); in partition_check_cpu()
37 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && in partition_irq_mask()
48 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && in partition_irq_unmask()
61 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && in partition_irq_set_irqchip_state()
76 if (partition_check_cpu(part, smp_processor_id(), d->hwirq) && in partition_irq_get_irqchip_state()
101 seq_printf(p, " %5s-%lu", chip->name, data->hwirq); in partition_irq_print_chip()
118 int hwirq; in partition_handle_irq() local
122 for_each_set_bit(hwirq, part->bitmap, part->nr_parts) { in partition_handle_irq()
123 if (partition_check_cpu(part, cpu, hwirq)) in partition_handle_irq()
[all …]
Dirq-xilinx-intc.c63 unsigned long mask = 1 << d->hwirq; in intc_enable_or_unmask()
65 pr_debug("irq-xilinx: enable_or_unmask: %ld\n", d->hwirq); in intc_enable_or_unmask()
79 pr_debug("irq-xilinx: disable: %ld\n", d->hwirq); in intc_disable_or_mask()
80 xintc_write(CIE, 1 << d->hwirq); in intc_disable_or_mask()
85 pr_debug("irq-xilinx: ack: %ld\n", d->hwirq); in intc_ack()
86 xintc_write(IAR, 1 << d->hwirq); in intc_ack()
91 unsigned long mask = 1 << d->hwirq; in intc_mask_ack()
93 pr_debug("irq-xilinx: disable_and_ack: %ld\n", d->hwirq); in intc_mask_ack()
108 unsigned int hwirq, irq = -1; in xintc_get_irq() local
110 hwirq = xintc_read(IVR); in xintc_get_irq()
[all …]
Dirq-sni-exiu.c44 writel(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_eoi()
53 val = readl_relaxed(data->base + EIMASK) | BIT(d->hwirq); in exiu_irq_mask()
63 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_unmask()
74 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_enable()
76 val = readl_relaxed(data->base + EIMASK) & ~BIT(d->hwirq); in exiu_irq_enable()
88 val |= BIT(d->hwirq); in exiu_irq_set_type()
90 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
95 val &= ~BIT(d->hwirq); in exiu_irq_set_type()
97 val |= BIT(d->hwirq); in exiu_irq_set_type()
100 writel_relaxed(BIT(d->hwirq), data->base + EIREQCLR); in exiu_irq_set_type()
[all …]
Dirq-mmp.c71 int hwirq; in icu_mask_ack_irq() local
74 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
76 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
79 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
83 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
86 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_ack_irq()
95 int hwirq; in icu_mask_irq() local
98 hwirq = d->irq - data->virq_base; in icu_mask_irq()
100 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_irq()
103 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); in icu_mask_irq()
[all …]
/Linux-v5.4/arch/powerpc/platforms/85xx/
Dsocrates_fpga_pic.c109 unsigned int irq_line, hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_ack() local
112 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_ack()
116 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_ack()
124 unsigned int hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_mask() local
128 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_mask()
132 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask()
140 unsigned int hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_mask_ack() local
144 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_mask_ack()
148 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask_ack()
149 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_mask_ack()
[all …]
/Linux-v5.4/arch/powerpc/platforms/pasemi/
Dmsi.c61 irq_hw_number_t hwirq; in pasemi_msi_teardown_msi_irqs() local
69 hwirq = virq_to_hw(entry->irq); in pasemi_msi_teardown_msi_irqs()
72 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK); in pasemi_msi_teardown_msi_irqs()
83 int hwirq; in pasemi_msi_setup_msi_irqs() local
99 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, in pasemi_msi_setup_msi_irqs()
101 if (hwirq < 0) { in pasemi_msi_setup_msi_irqs()
103 return hwirq; in pasemi_msi_setup_msi_irqs()
106 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); in pasemi_msi_setup_msi_irqs()
109 hwirq); in pasemi_msi_setup_msi_irqs()
110 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, in pasemi_msi_setup_msi_irqs()
[all …]
/Linux-v5.4/arch/powerpc/platforms/powernv/
Dpci-cxl.c42 int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); in pnv_cxl_alloc_hwirqs() local
44 if (hwirq < 0) { in pnv_cxl_alloc_hwirqs()
49 return phb->msi_base + hwirq; in pnv_cxl_alloc_hwirqs()
53 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num) in pnv_cxl_release_hwirqs() argument
58 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num); in pnv_cxl_release_hwirqs()
67 int i, hwirq; in pnv_cxl_release_hwirq_ranges() local
75 hwirq = irqs->offset[i] - phb->msi_base; in pnv_cxl_release_hwirq_ranges()
76 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, in pnv_cxl_release_hwirq_ranges()
87 int i, hwirq, try; in pnv_cxl_alloc_hwirq_ranges() local
95 hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, try); in pnv_cxl_alloc_hwirq_ranges()
[all …]
/Linux-v5.4/kernel/irq/
Dirqdomain.c478 irq_hw_number_t hwirq) in irq_domain_clear_mapping() argument
480 if (hwirq < domain->revmap_size) { in irq_domain_clear_mapping()
481 domain->linear_revmap[hwirq] = 0; in irq_domain_clear_mapping()
484 radix_tree_delete(&domain->revmap_tree, hwirq); in irq_domain_clear_mapping()
490 irq_hw_number_t hwirq, in irq_domain_set_mapping() argument
493 if (hwirq < domain->revmap_size) { in irq_domain_set_mapping()
494 domain->linear_revmap[hwirq] = irq_data->irq; in irq_domain_set_mapping()
497 radix_tree_insert(&domain->revmap_tree, hwirq, irq_data); in irq_domain_set_mapping()
505 irq_hw_number_t hwirq; in irq_domain_disassociate() local
511 hwirq = irq_data->hwirq; in irq_domain_disassociate()
[all …]
/Linux-v5.4/drivers/pci/controller/
Dpcie-iproc-msi.c146 static inline u32 hwirq_to_group(struct iproc_msi *msi, unsigned long hwirq) in hwirq_to_group() argument
148 return (hwirq % msi->nr_irqs); in hwirq_to_group()
152 unsigned long hwirq) in iproc_msi_addr_offset() argument
155 return hwirq_to_group(msi, hwirq) * MSI_MEM_REGION_SIZE; in iproc_msi_addr_offset()
157 return hwirq_to_group(msi, hwirq) * sizeof(u32); in iproc_msi_addr_offset()
195 static inline int hwirq_to_cpu(struct iproc_msi *msi, unsigned long hwirq) in hwirq_to_cpu() argument
197 return (hwirq % msi->nr_cpus); in hwirq_to_cpu()
201 unsigned long hwirq) in hwirq_to_canonical_hwirq()
203 return (hwirq - hwirq_to_cpu(msi, hwirq)); in hwirq_to_canonical_hwirq()
213 curr_cpu = hwirq_to_cpu(msi, data->hwirq); in iproc_msi_irq_set_affinity()
[all …]
Dpci-xgene-msi.c126 static u32 hwirq_to_reg_set(unsigned long hwirq) in hwirq_to_reg_set() argument
128 return (hwirq / (NR_HW_IRQS * IRQS_PER_IDX)); in hwirq_to_reg_set()
131 static u32 hwirq_to_group(unsigned long hwirq) in hwirq_to_group() argument
133 return (hwirq % NR_HW_IRQS); in hwirq_to_group()
136 static u32 hwirq_to_msi_data(unsigned long hwirq) in hwirq_to_msi_data() argument
138 return ((hwirq / NR_HW_IRQS) % IRQS_PER_IDX); in hwirq_to_msi_data()
144 u32 reg_set = hwirq_to_reg_set(data->hwirq); in xgene_compose_msi_msg()
145 u32 group = hwirq_to_group(data->hwirq); in xgene_compose_msi_msg()
150 msg->data = hwirq_to_msi_data(data->hwirq); in xgene_compose_msi_msg()
162 static int hwirq_to_cpu(unsigned long hwirq) in hwirq_to_cpu() argument
[all …]
/Linux-v5.4/drivers/pinctrl/mediatek/
Dmtk-eint.c84 static int mtk_eint_flip_edge(struct mtk_eint *eint, int hwirq) in mtk_eint_flip_edge() argument
88 u32 mask = BIT(hwirq & 0x1f); in mtk_eint_flip_edge()
89 u32 port = (hwirq >> 5) & eint->hw->port_mask; in mtk_eint_flip_edge()
92 curr_level = eint->gpio_xlate->get_gpio_state(eint->pctl, hwirq); in mtk_eint_flip_edge()
103 hwirq); in mtk_eint_flip_edge()
112 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_mask()
113 void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, in mtk_eint_mask()
116 eint->cur_mask[d->hwirq >> 5] &= ~mask; in mtk_eint_mask()
124 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_unmask()
125 void __iomem *reg = mtk_eint_get_offset(eint, d->hwirq, in mtk_eint_unmask()
[all …]
/Linux-v5.4/arch/arm/mach-imx/
Dgpc.c91 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake()
94 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake()
126 void imx_gpc_hwirq_unmask(unsigned int hwirq) in imx_gpc_hwirq_unmask() argument
131 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_unmask()
133 val &= ~(1 << hwirq % 32); in imx_gpc_hwirq_unmask()
137 void imx_gpc_hwirq_mask(unsigned int hwirq) in imx_gpc_hwirq_mask() argument
142 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_mask()
144 val |= 1 << (hwirq % 32); in imx_gpc_hwirq_mask()
150 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask()
156 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask()
[all …]
Davic.c51 static int avic_set_irq_fiq(unsigned int hwirq, unsigned int type) in avic_set_irq_fiq() argument
55 if (hwirq >= AVIC_NUM_IRQS) in avic_set_irq_fiq()
58 if (hwirq < AVIC_NUM_IRQS / 2) { in avic_set_irq_fiq()
59 irqt = imx_readl(avic_base + AVIC_INTTYPEL) & ~(1 << hwirq); in avic_set_irq_fiq()
60 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEL); in avic_set_irq_fiq()
62 hwirq -= AVIC_NUM_IRQS / 2; in avic_set_irq_fiq()
63 irqt = imx_readl(avic_base + AVIC_INTTYPEH) & ~(1 << hwirq); in avic_set_irq_fiq()
64 imx_writel(irqt | (!!type << hwirq), avic_base + AVIC_INTTYPEH); in avic_set_irq_fiq()
85 int idx = d->hwirq >> 5; in avic_irq_suspend()
91 u8 offs = d->hwirq < AVIC_NUM_IRQS / 2 ? in avic_irq_suspend()
[all …]
/Linux-v5.4/drivers/gpio/
Dgpio-hlwd.c65 int hwirq; in hlwd_gpio_irqhandler() local
100 for_each_set_bit(hwirq, &pending, 32) { in hlwd_gpio_irqhandler()
101 int irq = irq_find_mapping(hlwd->gpioc.irq.domain, hwirq); in hlwd_gpio_irqhandler()
114 iowrite32be(BIT(data->hwirq), hlwd->regs + HW_GPIOB_INTFLAG); in hlwd_gpio_irq_ack()
126 mask &= ~BIT(data->hwirq); in hlwd_gpio_irq_mask()
140 mask |= BIT(data->hwirq); in hlwd_gpio_irq_unmask()
151 static void hlwd_gpio_irq_setup_emulation(struct hlwd_gpio *hlwd, int hwirq, in hlwd_gpio_irq_setup_emulation() argument
158 state = ioread32be(hlwd->regs + HW_GPIOB_IN) & BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
159 level &= ~BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
160 level |= state ^ BIT(hwirq); in hlwd_gpio_irq_setup_emulation()
[all …]
/Linux-v5.4/drivers/misc/cxl/
Dirq.c173 irq_hw_number_t hwirq = irqd_to_hwirq(irq_get_irq_data(irq)); in cxl_irq_afu() local
191 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu()
201 ctx->pe, irq, hwirq); in cxl_irq_afu()
205 trace_cxl_afu_irq(ctx, afu_irq, irq, hwirq); in cxl_irq_afu()
207 afu_irq, ctx->pe, irq, hwirq); in cxl_irq_afu()
223 unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, in cxl_map_irq() argument
230 virq = irq_create_mapping(NULL, hwirq); in cxl_map_irq()
237 cxl_ops->setup_irq(adapter, hwirq, virq); in cxl_map_irq()
239 pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq); in cxl_map_irq()
262 int hwirq, virq; in cxl_register_one_irq() local
[all …]
/Linux-v5.4/arch/powerpc/sysdev/ge/
Dge_pic.c114 unsigned int hwirq = irqd_to_hwirq(d); in gef_pic_mask() local
119 mask &= ~(1 << hwirq); in gef_pic_mask()
135 unsigned int hwirq = irqd_to_hwirq(d); in gef_pic_unmask() local
140 mask |= (1 << hwirq); in gef_pic_unmask()
157 irq_hw_number_t hwirq) in gef_pic_host_map() argument
232 int hwirq; in gef_pic_get_irq() local
241 for (hwirq = GEF_PIC_NUM_IRQS - 1; hwirq > -1; hwirq--) { in gef_pic_get_irq()
242 if (active & (0x1 << hwirq)) in gef_pic_get_irq()
246 (irq_hw_number_t)hwirq); in gef_pic_get_irq()
/Linux-v5.4/drivers/vfio/platform/
Dvfio_platform_irq.c25 disable_irq_nosync(irq_ctx->hwirq); in vfio_platform_mask()
85 enable_irq(irq_ctx->hwirq); in vfio_platform_unmask()
151 disable_irq_nosync(irq_ctx->hwirq); in vfio_automasked_irq_handler()
180 irq_clear_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
181 free_irq(irq->hwirq, irq); in vfio_set_trigger()
191 irq->hwirq, vdev->name); in vfio_set_trigger()
203 irq_set_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
204 ret = request_irq(irq->hwirq, handler, 0, irq->name, irq); in vfio_set_trigger()
213 enable_irq(irq->hwirq); in vfio_set_trigger()
244 handler(irq->hwirq, irq); in vfio_platform_set_irq_trigger()
[all …]

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