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Searched refs:gate_clks (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/drivers/clk/samsung/
Dclk-exynos7.c193 .gate_clks = topc_gate_clks,
385 .gate_clks = top0_gate_clks,
562 .gate_clks = top1_gate_clks,
609 .gate_clks = ccore_gate_clks,
676 .gate_clks = peric0_gate_clks,
800 .gate_clks = peric1_gate_clks,
855 .gate_clks = peris_gate_clks,
965 .gate_clks = fsys0_gate_clks,
1096 .gate_clks = fsys1_gate_clks,
1209 .gate_clks = mscl_gate_clks,
[all …]
Dclk-exynos5260.c136 .gate_clks = aud_gate_clks,
326 .gate_clks = disp_gate_clks,
490 .gate_clks = fsys_gate_clks,
581 .gate_clks = g2d_gate_clks,
644 .gate_clks = g3d_gate_clks,
777 .gate_clks = gscl_gate_clks,
896 .gate_clks = isp_gate_clks,
1016 .gate_clks = mfc_gate_clks,
1165 .gate_clks = mif_gate_clks,
1371 .gate_clks = peri_gate_clks,
[all …]
Dclk-exynos5-subcmu.h16 const struct samsung_gate_clock *gate_clks; member
Dclk-exynos5-subcmu.c66 exynos5_subcmu_defer_gate(ctx, (*_cmu)->gate_clks, in exynos5_subcmus_init()
110 samsung_clk_register_gate(ctx, info->gate_clks, info->nr_gate_clks); in exynos5_subcmu_probe()
Dclk-exynos3250.c429 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
779 .gate_clks = gate_clks,
780 .nr_gate_clks = ARRAY_SIZE(gate_clks),
1066 .gate_clks = isp_gate_clks,
Dclk-exynos5433.c795 .gate_clks = top_gate_clks,
878 .gate_clks = cpif_gate_clks,
1530 .gate_clks = mif_gate_clks,
1730 .gate_clks = peric_gate_clks,
1924 .gate_clks = peris_gate_clks,
2334 .gate_clks = fsys_gate_clks,
2459 .gate_clks = g2d_gate_clks,
2883 .gate_clks = disp_gate_clks,
3055 .gate_clks = aud_gate_clks,
3189 .gate_clks = bus##id##_gate_clks, \
[all …]
Dclk.c373 if (cmu->gate_clks) in samsung_cmu_register_one()
374 samsung_clk_register_gate(ctx, cmu->gate_clks, in samsung_cmu_register_one()
Dclk-s5pv210.c546 static const struct samsung_gate_clock gate_clks[] __initconst = { variable
776 samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks)); in __s5pv210_clk_init()
Dclk-exynos5420.c1319 .gate_clks = exynos5x_disp_gate_clks,
1329 .gate_clks = exynos5x_gsc_gate_clks,
1337 .gate_clks = exynos5x_g3d_gate_clks,
1347 .gate_clks = exynos5x_mfc_gate_clks,
1357 .gate_clks = exynos5x_mscl_gate_clks,
1365 .gate_clks = exynos5800_mau_gate_clks,
Dclk-exynos5410.c261 .gate_clks = exynos5410_gate_clks,
Dclk.h294 const struct samsung_gate_clock *gate_clks; member
Dclk-exynos5250.c677 .gate_clks = exynos5250_disp_gate_clks,
/Linux-v5.4/drivers/clk/tegra/
Dclk-tegra-periph.c780 static struct tegra_periph_init_data gate_clks[] = { variable
902 for (i = 0; i < ARRAY_SIZE(gate_clks); i++) { in gate_clk_init()
905 data = gate_clks + i; in gate_clk_init()