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Searched refs:flushing (Results 1 – 25 of 54) sorted by relevance

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/Linux-v5.4/Documentation/admin-guide/hw-vuln/
Dl1tf.rst148 'L1D vulnerable' L1D flushing is disabled
191 The conditional mode avoids L1D flushing after VMEXITs which execute
373 the hypervisors, i.e. unconditional L1D flushing
386 mitigation, i.e. conditional L1D flushing
395 i.e. conditional L1D flushing.
413 The default is 'flush'. For details about L1D flushing see :ref:`l1d_flush`.
421 The KVM hypervisor mitigation mechanism, flushing the L1D cache when
466 To avoid the overhead of the default L1D flushing on VMENTER the
467 administrator can disable the flushing via the kernel command line and
479 the kernel, it's only required to enforce L1D flushing on VMENTER.
[all …]
/Linux-v5.4/drivers/staging/speakup/
Dspeakup_soft.c219 if (!synth_buffer_empty() || speakup_info.flushing) in softsynthx_read()
243 if (speakup_info.flushing) { in softsynthx_read()
244 speakup_info.flushing = 0; in softsynthx_read()
340 (!synth_buffer_empty() || speakup_info.flushing)) in softsynth_poll()
Dsynth.c41 .flushing = 0,
78 if (speakup_info.flushing) { in _spk_do_catch_up()
79 speakup_info.flushing = 0; in _spk_do_catch_up()
199 speakup_info.flushing = 1; in spk_do_flush()
Dthread.c35 (speakup_info.flushing || in speakup_thread()
Dspeakup_decext.c161 if (speakup_info.flushing) { in do_catch_up()
162 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_apollo.c150 if (speakup_info.flushing) { in do_catch_up()
151 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_keypc.c187 if (speakup_info.flushing) { in do_catch_up()
188 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_dectlk.c228 if (speakup_info.flushing) { in do_catch_up()
229 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_acntpc.c186 if (speakup_info.flushing) { in do_catch_up()
187 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_decpc.c379 if (speakup_info.flushing) { in do_catch_up()
380 speakup_info.flushing = 0; in do_catch_up()
Dspeakup_dtlk.c199 if (speakup_info.flushing) { in do_catch_up()
200 speakup_info.flushing = 0; in do_catch_up()
Dspk_types.h212 int flushing; member
/Linux-v5.4/Documentation/core-api/
Dcachetlb.rst7 This document describes the cache/tlb flushing interfaces called
17 thinking SMP cache/tlb flushing must be so inefficient, this is in
23 First, the TLB flushing interfaces, since they are the simplest. The
56 Here we are flushing a specific range of (user) virtual
104 Next, we have the cache flushing interfaces. In general, when Linux
126 The cache flushing routines below need only deal with cache flushing
161 Here we are flushing a specific range of (user) virtual
211 Here in these two interfaces we are flushing a specific range
337 Any necessary cache flushing or other coherency operations
387 coherency. It must do this by flushing the vmap range before doing
/Linux-v5.4/include/trace/events/
Djbd2.h247 __field( unsigned long, flushing )
261 __entry->flushing = stats->rs_flushing;
276 jiffies_to_msecs(__entry->flushing),
/Linux-v5.4/drivers/infiniband/hw/mlx4/
Dmcg.c686 } else if (method == IB_SA_METHOD_DELETE_RESP && group->demux->flushing) in mlx4_ib_mcg_work_handler()
941 if (ctx->flushing) in mlx4_ib_mcg_multiplex_handler()
1055 ctx->flushing = 0; in mlx4_ib_mcg_port_init()
1124 cw->ctx->flushing = 0; in mcg_clean_task()
1132 if (ctx->flushing) in mlx4_ib_mcg_port_cleanup()
1135 ctx->flushing = 1; in mlx4_ib_mcg_port_cleanup()
1139 ctx->flushing = 0; in mlx4_ib_mcg_port_cleanup()
1145 ctx->flushing = 0; in mlx4_ib_mcg_port_cleanup()
/Linux-v5.4/Documentation/x86/
Dpti.rst96 allows us to skip flushing the entire TLB when switching page
119 h. INVPCID is a TLB-flushing instruction which allows flushing
123 flushing a kernel address, we need to flush all PCIDs, so a
124 single kernel address flush will require a TLB-flushing CR3
Dtlb.rst22 address space is obviously better performed by flushing the
/Linux-v5.4/fs/xfs/
Dxfs_trans_ail.c373 int flushing = 0; in xfsaild_push() local
443 flushing++; in xfsaild_push()
503 } else if (((stuck + flushing) * 100) / count > 90) { in xfsaild_push()
/Linux-v5.4/Documentation/block/
Dwriteback_cache_control.rst45 worry if the underlying devices need any explicit cache flushing and how
71 driver needs to tell the block layer that it supports flushing caches by
/Linux-v5.4/arch/mips/sgi-ip27/
DTODO19 13. Cache flushing (specially the SMP version) has to be investigated.
/Linux-v5.4/fs/ceph/
Dcaps.c1271 int flushing, u64 flush_tid, u64 oldest_flush_tid) in __send_cap() argument
1331 arg.follows = flushing ? ci->i_head_snapc->seq : 0; in __send_cap()
1340 if (flushing & CEPH_CAP_XATTR_EXCL) { in __send_cap()
1357 arg.dirty = flushing; in __send_cap()
1730 int flushing; in __mark_caps_flushing() local
1736 flushing = ci->i_dirty_caps; in __mark_caps_flushing()
1738 ceph_cap_string(flushing), in __mark_caps_flushing()
1740 ceph_cap_string(ci->i_flushing_caps | flushing)); in __mark_caps_flushing()
1741 ci->i_flushing_caps |= flushing; in __mark_caps_flushing()
1746 cf->caps = flushing; in __mark_caps_flushing()
[all …]
/Linux-v5.4/Documentation/admin-guide/device-mapper/
Dlog-writes.rst20 to make it easier to detect improper waiting/flushing.
39 Any REQ_FUA requests bypass this flushing mechanism and are logged as soon as
/Linux-v5.4/fs/btrfs/
Ddelayed-ref.h166 int flushing; member
/Linux-v5.4/drivers/virtio/
DKconfig53 - with a virtio-based flushing interface.
/Linux-v5.4/arch/arm/mm/
Dcache-v7.S102 bne start_flush_levels @ LoU != 0, start flushing
110 beq start_flush_levels @ start flushing cache levels

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