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Searched refs:feature_mask (Results 1 – 25 of 36) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dhwmgr.c101 hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
111 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
115 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
120 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
128 hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK; in hwmgr_early_init()
133 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
141 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
146 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
156 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
165 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
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Dvega20_hwmgr.c100 if (!(hwmgr->feature_mask & PP_PCIE_DPM_MASK)) in vega20_set_default_registry_data()
103 if (!(hwmgr->feature_mask & PP_SCLK_DPM_MASK)) in vega20_set_default_registry_data()
106 if (!(hwmgr->feature_mask & PP_SOCCLK_DPM_MASK)) in vega20_set_default_registry_data()
109 if (!(hwmgr->feature_mask & PP_MCLK_DPM_MASK)) in vega20_set_default_registry_data()
112 if (!(hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK)) in vega20_set_default_registry_data()
115 if (!(hwmgr->feature_mask & PP_ULV_MASK)) in vega20_set_default_registry_data()
118 if (!(hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK)) in vega20_set_default_registry_data()
1793 static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_min_level() argument
1801 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_min_level()
1811 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in vega20_upload_dpm_min_level()
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Dvega10_hwmgr.c118 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
120 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
122 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
124 hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; in vega10_set_default_registry_data()
127 hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
129 if (hwmgr->feature_mask & PP_POWER_CONTAINMENT_MASK) { in vega10_set_default_registry_data()
136 hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false; in vega10_set_default_registry_data()
139 hwmgr->feature_mask & PP_ULV_MASK ? true : false; in vega10_set_default_registry_data()
142 hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false; in vega10_set_default_registry_data()
151 hwmgr->feature_mask & PP_AVFS_MASK ? true : false; in vega10_set_default_registry_data()
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Dsmu7_clockpowergating.c170 if (!(hwmgr->feature_mask & PP_ENABLE_GFX_CG_THRU_SMU)) in smu7_update_clock_gatings()
/Linux-v5.4/arch/arm64/kernel/
Dalternative.c148 unsigned long *feature_mask) in __apply_alternatives() argument
158 if (!test_bit(alt->cpufeature, feature_mask)) in __apply_alternatives()
201 feature_mask, ARM64_NCAPS); in __apply_alternatives()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Damdgpu_smu.c64 uint32_t feature_mask[2] = { 0 }; in smu_sys_get_pp_feature_mask() local
70 ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); in smu_sys_get_pp_feature_mask()
75 feature_mask[1], feature_mask[0]); in smu_sys_get_pp_feature_mask()
101 uint32_t feature_mask[2] = { 0 }; in smu_sys_set_pp_feature_mask() local
106 ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); in smu_sys_set_pp_feature_mask()
110 feature_enables = ((uint64_t)feature_mask[1] << 32 | (uint64_t)feature_mask[0]); in smu_sys_set_pp_feature_mask()
572 int smu_feature_update_enable_state(struct smu_context *smu, uint64_t feature_mask, bool enabled) in smu_feature_update_enable_state() argument
580 feature_low = (feature_mask >> 0 ) & 0xffffffff; in smu_feature_update_enable_state()
581 feature_high = (feature_mask >> 32) & 0xffffffff; in smu_feature_update_enable_state()
636 uint64_t feature_mask = 0; in smu_feature_set_enabled() local
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Dnavi10_ppt.c320 uint32_t *feature_mask, uint32_t num) in navi10_get_allowed_feature_mask() argument
327 memset(feature_mask, 0, sizeof(uint32_t) * num); in navi10_get_allowed_feature_mask()
329 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in navi10_get_allowed_feature_mask()
355 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) in navi10_get_allowed_feature_mask()
360 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); in navi10_get_allowed_feature_mask()
362 *(uint64_t *)feature_mask &= ~FEATURE_MASK(FEATURE_FW_DSTATE_BIT); in navi10_get_allowed_feature_mask()
366 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT); in navi10_get_allowed_feature_mask()
369 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT); in navi10_get_allowed_feature_mask()
372 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_VCN_PG_BIT) in navi10_get_allowed_feature_mask()
380 *(uint64_t *)feature_mask &= in navi10_get_allowed_feature_mask()
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Dsmu_v11_0.c850 uint32_t feature_mask[2]; in smu_v11_0_set_allowed_mask() local
856 bitmap_copy((unsigned long *)feature_mask, feature->allowed, 64); in smu_v11_0_set_allowed_mask()
859 feature_mask[1]); in smu_v11_0_set_allowed_mask()
864 feature_mask[0]); in smu_v11_0_set_allowed_mask()
874 uint32_t *feature_mask, uint32_t num) in smu_v11_0_get_enabled_mask() argument
879 if (!feature_mask || num < 2) in smu_v11_0_get_enabled_mask()
896 feature_mask[0] = feature_mask_low; in smu_v11_0_get_enabled_mask()
897 feature_mask[1] = feature_mask_high; in smu_v11_0_get_enabled_mask()
906 uint32_t feature_mask[2]; in smu_v11_0_system_features_control() local
916 ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); in smu_v11_0_system_features_control()
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Darcturus_ppt.c342 uint32_t *feature_mask, uint32_t num) in arcturus_get_allowed_feature_mask() argument
348 memset(feature_mask, 0xFF, sizeof(uint32_t) * num); in arcturus_get_allowed_feature_mask()
695 uint32_t feature_mask) in arcturus_upload_dpm_level() argument
704 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in arcturus_upload_dpm_level()
719 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in arcturus_upload_dpm_level()
734 (feature_mask & FEATURE_DPM_SOCCLK_MASK)) { in arcturus_upload_dpm_level()
1886 uint32_t feature_mask[2]; in arcturus_is_dpm_running() local
1888 ret = smu_feature_get_enabled_mask(smu, feature_mask, 2); in arcturus_is_dpm_running()
1889 feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | in arcturus_is_dpm_running()
1890 ((uint64_t)feature_mask[1] << 32)); in arcturus_is_dpm_running()
Dvega20_ppt.c591 uint32_t *feature_mask, uint32_t num) in vega20_get_allowed_feature_mask() argument
596 memset(feature_mask, 0, sizeof(uint32_t) * num); in vega20_get_allowed_feature_mask()
598 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in vega20_get_allowed_feature_mask()
1184 uint32_t feature_mask) in vega20_upload_dpm_level() argument
1194 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_level()
1209 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in vega20_upload_dpm_level()
1224 (feature_mask & FEATURE_DPM_SOCCLK_MASK)) { in vega20_upload_dpm_level()
1239 (feature_mask & FEATURE_DPM_FCLK_MASK)) { in vega20_upload_dpm_level()
1254 (feature_mask & FEATURE_DPM_DCEFCLK_MASK)) { in vega20_upload_dpm_level()
2864 uint32_t feature_mask[2]; in vega20_is_dpm_running() local
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/Linux-v5.4/drivers/mfd/
Dkempld-core.c66 pld->feature_mask = kempld_read16(pld, KEMPLD_FEATURE); in kempld_get_info_generic()
68 pld->feature_mask = 0; in kempld_get_info_generic()
104 if (pld->feature_mask & KEMPLD_FEATURE_BIT_I2C) in kempld_register_cells_generic()
107 if (pld->feature_mask & KEMPLD_FEATURE_BIT_WATCHDOG) in kempld_register_cells_generic()
110 if (pld->feature_mask & KEMPLD_FEATURE_BIT_GPIO) in kempld_register_cells_generic()
113 if (pld->feature_mask & KEMPLD_FEATURE_MASK_UART) in kempld_register_cells_generic()
/Linux-v5.4/arch/x86/mm/
Dmem_encrypt_identity.c491 unsigned long feature_mask; in sme_enable() local
513 feature_mask = (ecx & BIT(31)) ? AMD_SEV_BIT : AMD_SME_BIT; in sme_enable()
526 if (!(eax & feature_mask)) in sme_enable()
532 if (feature_mask == AMD_SME_BIT) { in sme_enable()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dvega10_smumgr.h46 bool enable, uint32_t feature_mask);
Dvega12_smumgr.h52 bool enable, uint64_t feature_mask);
Dvega20_smumgr.h51 bool enable, uint64_t feature_mask);
Dvega12_smumgr.c118 bool enable, uint64_t feature_mask) in vega12_enable_smc_features() argument
122 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega12_enable_smc_features()
123 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega12_enable_smc_features()
Dvega20_smumgr.c302 bool enable, uint64_t feature_mask) in vega20_enable_smc_features() argument
307 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega20_enable_smc_features()
308 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega20_enable_smc_features()
Dvega10_smumgr.c98 bool enable, uint32_t feature_mask) in vega10_enable_smc_features() argument
104 msg, feature_mask); in vega10_enable_smc_features()
/Linux-v5.4/drivers/net/
Dtap.c929 netdev_features_t feature_mask = 0; in set_offload() local
938 feature_mask = NETIF_F_HW_CSUM; in set_offload()
942 feature_mask |= NETIF_F_TSO_ECN; in set_offload()
944 feature_mask |= NETIF_F_TSO; in set_offload()
946 feature_mask |= NETIF_F_TSO6; in set_offload()
958 if (feature_mask & (NETIF_F_TSO | NETIF_F_TSO6)) in set_offload()
966 tap->tap_features = feature_mask; in set_offload()
/Linux-v5.4/include/linux/mfd/
Dkempld.h91 u32 feature_mask; member
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/
Damdgpu_smu.h402 int (*get_allowed_feature_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
496 int (*get_enabled_mask)(struct smu_context *smu, uint32_t *feature_mask, uint32_t num);
702 #define smu_get_allowed_feature_mask(smu, feature_mask, num) \ argument
703 …owed_feature_mask? (smu)->ppt_funcs->get_allowed_feature_mask((smu), (feature_mask), (num)) : 0) :…
831 int smu_feature_update_enable_state(struct smu_context *smu, uint64_t feature_mask, bool enabled);
/Linux-v5.4/arch/ia64/kernel/
Dsal.c153 sal_platform_features = pf->feature_mask; in sal_desc_platform_feature()
/Linux-v5.4/drivers/infiniband/hw/efa/
Defa_com_cmd.c358 u32 feature_mask = 1 << feature_id; in efa_com_check_supported_feature_id() local
362 !(edev->supported_features & feature_mask)) in efa_com_check_supported_feature_id()
/Linux-v5.4/sound/soc/intel/skylake/
Dskl-sst-utils.c71 u32 feature_mask; member
/Linux-v5.4/drivers/watchdog/
Dkempld_wdt.c403 if (pld->feature_mask & KEMPLD_FEATURE_BIT_NMI) { in kempld_wdt_probe_stages()

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