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Searched refs:fbdiv (Results 1 – 25 of 30) sorted by relevance

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/Linux-v5.4/drivers/clk/zynqmp/
Dpll.c100 u32 fbdiv; in zynqmp_pll_round_rate() local
110 fbdiv = rate / PS_PLL_VCO_MAX; in zynqmp_pll_round_rate()
111 rate = rate / (fbdiv + 1); in zynqmp_pll_round_rate()
114 fbdiv = DIV_ROUND_UP(PS_PLL_VCO_MIN, rate); in zynqmp_pll_round_rate()
115 rate = rate * fbdiv; in zynqmp_pll_round_rate()
120 fbdiv = DIV_ROUND_CLOSEST(rate, *prate); in zynqmp_pll_round_rate()
121 fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX); in zynqmp_pll_round_rate()
122 return *prate * fbdiv; in zynqmp_pll_round_rate()
138 u32 fbdiv, data; in zynqmp_pll_recalc_rate() local
144 ret = eemi_ops->clock_getdivider(clk_id, &fbdiv); in zynqmp_pll_recalc_rate()
[all …]
/Linux-v5.4/drivers/clk/zynq/
Dpll.c54 u32 fbdiv; in zynq_pll_round_rate() local
56 fbdiv = DIV_ROUND_CLOSEST(rate, *prate); in zynq_pll_round_rate()
57 if (fbdiv < PLL_FBDIV_MIN) in zynq_pll_round_rate()
58 fbdiv = PLL_FBDIV_MIN; in zynq_pll_round_rate()
59 else if (fbdiv > PLL_FBDIV_MAX) in zynq_pll_round_rate()
60 fbdiv = PLL_FBDIV_MAX; in zynq_pll_round_rate()
62 return *prate * fbdiv; in zynq_pll_round_rate()
75 u32 fbdiv; in zynq_pll_recalc_rate() local
81 fbdiv = (readl(clk->pll_ctrl) & PLLCTRL_FBDIV_MASK) >> in zynq_pll_recalc_rate()
84 return parent_rate * fbdiv; in zynq_pll_recalc_rate()
/Linux-v5.4/drivers/clk/analogbits/
Dwrpll-cln28hpc.c227 u8 fbdiv, divq, best_r, r; in wrpll_configure_for_rate() local
263 fbdiv = __wrpll_calc_fbdiv(c); in wrpll_configure_for_rate()
275 f >>= (fbdiv - 1); in wrpll_configure_for_rate()
278 vco_pre = fbdiv * post_divr_freq; in wrpll_configure_for_rate()
333 u8 fbdiv; in wrpll_calc_output_rate() local
341 fbdiv = __wrpll_calc_fbdiv(c); in wrpll_calc_output_rate()
342 n = parent_rate * fbdiv * (c->divf + 1); in wrpll_calc_output_rate()
/Linux-v5.4/arch/mips/ralink/
Dmt7621.c120 int fbdiv = 0; in ralink_clk_init() local
137 fbdiv = ((rt_sysc_r32(0x648) >> 4) & 0x7F) + 1; in ralink_clk_init()
142 cpu_clk = 25 * fbdiv * 1000 * 1000; in ralink_clk_init()
145 cpu_clk = 40 * fbdiv * 1000 * 1000; in ralink_clk_init()
148 cpu_clk = 20 * fbdiv * 1000 * 1000; in ralink_clk_init()
/Linux-v5.4/drivers/clk/pistachio/
Dclk-pll.c211 vco *= (params->fbdiv << 24) + params->frac; in pll_gf40lp_frac_set_rate()
230 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT); in pll_gf40lp_frac_set_rate()
273 u64 val, prediv, fbdiv, frac, postdiv1, postdiv2, rate; in pll_gf40lp_frac_recalc_rate() local
277 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK; in pll_gf40lp_frac_recalc_rate()
289 rate *= (fbdiv << 24) + frac; in pll_gf40lp_frac_recalc_rate()
291 rate *= (fbdiv << 24); in pll_gf40lp_frac_recalc_rate()
366 vco = div_u64(params->fref * params->fbdiv, params->refdiv); in pll_gf40lp_laint_set_rate()
398 (params->fbdiv << PLL_CTRL1_FBDIV_SHIFT) | in pll_gf40lp_laint_set_rate()
413 u32 val, prediv, fbdiv, postdiv1, postdiv2; in pll_gf40lp_laint_recalc_rate() local
418 fbdiv = (val >> PLL_CTRL1_FBDIV_SHIFT) & PLL_CTRL1_FBDIV_MASK; in pll_gf40lp_laint_recalc_rate()
[all …]
Dclk.h98 unsigned long long fbdiv; member
/Linux-v5.4/drivers/clk/axs10x/
Di2s_pll_clock.c30 unsigned int fbdiv; member
105 unsigned int idiv, fbdiv, odiv; in i2s_pll_recalc_rate() local
108 fbdiv = i2s_pll_get_value(i2s_pll_read(clk, PLL_FBDIV_REG)); in i2s_pll_recalc_rate()
111 return ((parent_rate / idiv) * fbdiv) / odiv; in i2s_pll_recalc_rate()
148 i2s_pll_write(clk, PLL_FBDIV_REG, pll_cfg[i].fbdiv); in i2s_pll_set_rate()
Dpll_clock.c73 u32 fbdiv; member
143 u32 idiv, fbdiv, odiv; in axs10x_pll_recalc_rate() local
147 fbdiv = axs10x_div_get_value(axs10x_pll_read(clk, PLL_REG_FBDIV)); in axs10x_pll_recalc_rate()
150 rate = (u64)parent_rate * fbdiv; in axs10x_pll_recalc_rate()
189 axs10x_encode_div(pll_cfg[i].fbdiv, 0)); in axs10x_pll_set_rate()
/Linux-v5.4/drivers/clk/rockchip/
Dclk-pll.c134 rate->fbdiv = ((pllcon >> RK3036_PLLCON0_FBDIV_SHIFT) in rockchip_rk3036_pll_get_params()
161 rate64 *= cur.fbdiv; in rockchip_rk3036_pll_recalc_rate()
190 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3036_pll_set_params()
203 writel_relaxed(HIWORD_UPDATE(rate->fbdiv, RK3036_PLLCON0_FBDIV_MASK, in rockchip_rk3036_pll_set_params()
307 cur.fbdiv, cur.postdiv1, cur.refdiv, cur.postdiv2, in rockchip_rk3036_pll_init()
310 rate->fbdiv, rate->postdiv1, rate->refdiv, rate->postdiv2, in rockchip_rk3036_pll_init()
313 if (rate->fbdiv != cur.fbdiv || rate->postdiv1 != cur.postdiv1 || in rockchip_rk3036_pll_init()
609 rate->fbdiv = ((pllcon >> RK3399_PLLCON0_FBDIV_SHIFT) in rockchip_rk3399_pll_get_params()
638 rate64 *= cur.fbdiv; in rockchip_rk3399_pll_recalc_rate()
667 __func__, rate->rate, rate->fbdiv, rate->postdiv1, rate->refdiv, in rockchip_rk3399_pll_set_params()
[all …]
Dclk.h202 .fbdiv = _fbdiv, \
251 unsigned int fbdiv; member
/Linux-v5.4/drivers/clk/berlin/
Dberlin2-pll.c46 u32 val, fbdiv, rfdiv, vcodivsel, vcodiv; in berlin2_pll_recalc_rate() local
50 fbdiv = (val >> map->fbdiv_shift) & FBDIV_MASK; in berlin2_pll_recalc_rate()
66 rate *= fbdiv * map->mult; in berlin2_pll_recalc_rate()
Dberlin2-avpll.c159 u32 reg, refdiv, fbdiv; in berlin2_avpll_vco_recalc_rate() local
166 fbdiv = (reg & VCO_FBDIV_MASK) >> VCO_FBDIV_SHIFT; in berlin2_avpll_vco_recalc_rate()
167 freq *= fbdiv; in berlin2_avpll_vco_recalc_rate()
/Linux-v5.4/drivers/clk/
Dclk-hsdk-pll.c53 u32 fbdiv; member
139 val |= cfg->fbdiv << CGU_PLL_CTRL_FBDIV_SHIFT; in hsdk_pll_set_cfg()
168 u32 idiv, fbdiv, odiv; in hsdk_pll_recalc_rate() local
186 fbdiv = 2 * (1 + ((val & CGU_PLL_CTRL_FBDIV_MASK) >> CGU_PLL_CTRL_FBDIV_SHIFT)); in hsdk_pll_recalc_rate()
190 rate = (u64)parent_rate * fbdiv; in hsdk_pll_recalc_rate()
Dclk-axm5516.c52 unsigned long rate, fbdiv, refdiv, postdiv; in axxia_pllclk_recalc() local
57 fbdiv = ((control >> 4) & 0xfff) + 3; in axxia_pllclk_recalc()
59 rate = (parent_rate / (refdiv * postdiv)) * fbdiv; in axxia_pllclk_recalc()
/Linux-v5.4/drivers/phy/rockchip/
Dphy-rockchip-inno-hdmi.c254 u16 fbdiv; member
269 u16 fbdiv; member
640 RK3228_PRE_PLL_FB_DIV_8(cfg->fbdiv) | in inno_hdmi_phy_rk3228_clk_set_rate()
643 inno_write(inno, 0xe3, RK3228_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3228_clk_set_rate()
796 inno_write(inno, 0xa2, RK3328_PRE_PLL_FB_DIV_11_8(cfg->fbdiv) | val); in inno_hdmi_phy_rk3328_clk_set_rate()
797 inno_write(inno, 0xa3, RK3328_PRE_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3328_clk_set_rate()
910 RK3228_POST_PLL_FB_DIV_8(cfg->fbdiv)); in inno_hdmi_phy_rk3228_power_on()
911 inno_write(inno, 0xea, RK3228_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3228_power_on()
1018 inno_write(inno, 0xac, RK3328_POST_PLL_FB_DIV_7_0(cfg->fbdiv)); in inno_hdmi_phy_rk3328_power_on()
1021 inno_write(inno, 0xab, RK3328_POST_PLL_FB_DIV_8(cfg->fbdiv) | in inno_hdmi_phy_rk3328_power_on()
[all …]
/Linux-v5.4/drivers/gpu/drm/radeon/
Drv740_dpm.c133 u32 fbdiv; in rv740_populate_sclk_value() local
145 fbdiv = (u32) tmp; in rv740_populate_sclk_value()
155 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv740_populate_sclk_value()
165 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in rv740_populate_sclk_value()
Drv730_dpm.c53 u32 fbdiv; in rv730_populate_sclk_value() local
71 fbdiv = (u32) tmp; in rv730_populate_sclk_value()
87 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv730_populate_sclk_value()
97 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv730_populate_sclk_value()
Drs780_dpm.c213 u32 fbdiv = (RREG32(CG_SPLL_FUNC_CNTL) & SPLL_FB_DIV_MASK) >> SPLL_FB_DIV_SHIFT; in rs780_preset_starting_fbdiv() local
215 WREG32_P(FVTHROT_FBDIV_REG1, STARTING_FEEDBACK_DIV(fbdiv), in rs780_preset_starting_fbdiv()
218 WREG32_P(FVTHROT_FBDIV_REG2, FORCED_FEEDBACK_DIV(fbdiv), in rs780_preset_starting_fbdiv()
Drv770_dpm.c502 u32 fbdiv; in rv770_populate_sclk_value() local
519 fbdiv = (u32) tmp; in rv770_populate_sclk_value()
534 spll_func_cntl_3 |= SPLL_FB_DIV(fbdiv); in rv770_populate_sclk_value()
544 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv770_populate_sclk_value()
/Linux-v5.4/sound/soc/codecs/
Dmadera.c4307 int refdiv, fref, fout, lockdet_thr, fbdiv, hp, fast_clk, fllgcd; in madera_fllhj_apply() local
4331 fbdiv = 256; in madera_fllhj_apply()
4333 fbdiv = 4; in madera_fllhj_apply()
4337 fbdiv = 1; in madera_fllhj_apply()
4341 fbdiv = 1; in madera_fllhj_apply()
4366 while (ratio / fbdiv < min_n) { in madera_fllhj_apply()
4367 fbdiv /= 2; in madera_fllhj_apply()
4368 if (fbdiv < 1) { in madera_fllhj_apply()
4369 madera_fll_err(fll, "FBDIV (%d) must be >= 1\n", fbdiv); in madera_fllhj_apply()
4373 while (frac && (ratio / fbdiv > max_n)) { in madera_fllhj_apply()
[all …]
/Linux-v5.4/drivers/soc/xilinx/
Dxlnx_vcu.c124 u32 fbdiv; member
346 fvco = cfg->fbdiv * refclk; in xvcu_set_vcu_pll_info()
384 vcu_pll_ctrl |= (found->fbdiv & VCU_PLL_CTRL_FBDIV_MASK) << in xvcu_set_vcu_pll_info()
/Linux-v5.4/arch/arm/common/
Dsa1111.c1183 unsigned int skcdr, fbdiv, ipdiv, opdiv; in __sa1111_pll_clock() local
1187 fbdiv = (skcdr & 0x007f) + 2; in __sa1111_pll_clock()
1191 return 3686400 * fbdiv / (ipdiv * opdiv); in __sa1111_pll_clock()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c869 uint32_t fbdiv; in fiji_calculate_sclk_params() local
884 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in fiji_calculate_sclk_params()
894 SPLL_FB_DIV, fbdiv); in fiji_calculate_sclk_params()
917 fbdiv / (clk_s * 10000); in fiji_calculate_sclk_params()
Diceland_smumgr.c807 uint32_t fbdiv; in iceland_calculate_sclk_params() local
822 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in iceland_calculate_sclk_params()
832 CG_SPLL_FUNC_CNTL_3, SPLL_FB_DIV, fbdiv); in iceland_calculate_sclk_params()
852 uint32_t clkV = 4 * ss_info.speed_spectrum_percentage * fbdiv / (clkS * 10000); in iceland_calculate_sclk_params()
Dci_smumgr.c307 uint32_t fbdiv; in ci_calculate_sclk_params() local
322 fbdiv = dividers.ul_fb_div.ul_fb_divider & 0x3FFFFFF; in ci_calculate_sclk_params()
332 SPLL_FB_DIV, fbdiv); in ci_calculate_sclk_params()
348 fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()

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