| /Linux-v5.4/drivers/gpu/drm/radeon/ |
| D | trinity_dpm.c | 995 if ((old_rps->evclk != new_rps->evclk) || in trinity_set_vce_clock()
998 if (new_rps->evclk || new_rps->ecclk) in trinity_set_vce_clock()
1002 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in trinity_set_vce_clock()
1506 u32 evclk, u32 ecclk, u16 *voltage) in trinity_get_vce_clock_voltage() argument
1513 if (((evclk == 0) && (ecclk == 0)) || in trinity_get_vce_clock_voltage()
1520 if ((evclk <= table->entries[i].evclk) && in trinity_get_vce_clock_voltage()
1556 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in trinity_apply_state_adjust_rules()
1559 new_rps->evclk = 0; in trinity_apply_state_adjust_rules()
1577 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage); in trinity_apply_state_adjust_rules()
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| D | kv_dpm.c | 908 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()
912 (u8)kv_get_clk_bypass(rdev, table->entries[i].evclk); in kv_populate_vce_table()
915 table->entries[i].evclk, false, ÷rs); in kv_populate_vce_table()
1461 static u8 kv_get_vce_boot_level(struct radeon_device *rdev, u32 evclk) in kv_get_vce_boot_level() argument
1468 if (table->entries[i].evclk >= evclk) in kv_get_vce_boot_level()
1484 if (radeon_new_state->evclk > 0 && radeon_current_state->evclk == 0) { in kv_update_vce_dpm()
1491 pi->vce_boot_level = kv_get_vce_boot_level(rdev, radeon_new_state->evclk); in kv_update_vce_dpm()
1508 } else if (radeon_new_state->evclk == 0 && radeon_current_state->evclk > 0) { in kv_update_vce_dpm()
2156 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2159 new_rps->evclk = 0; in kv_apply_state_adjust_rules()
[all …]
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| D | radeon_asic.h | 698 int tn_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
750 int si_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
788 int cik_set_vce_clocks(struct radeon_device *rdev, u32 evclk, u32 ecclk);
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| D | si_dpm.c | 2937 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
2944 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
2951 if ((evclk <= table->entries[i].evclk) && in si_get_vce_clock_voltage()
3008 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3010 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3013 rps->evclk = 0; in si_apply_state_adjust_rules()
5935 if ((old_rps->evclk != new_rps->evclk) || in si_set_vce_clock()
5938 if (new_rps->evclk || new_rps->ecclk) in si_set_vce_clock()
5942 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk); in si_set_vce_clock()
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| D | radeon.h | 1341 u32 evclk; member
1436 u32 evclk; member
1525 u32 evclk; member
1961 int (*set_vce_clocks)(struct radeon_device *rdev, u32 evclk, u32 ecclk);
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| D | ci_dpm.c | 806 rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; in ci_apply_state_adjust_rules()
809 rps->evclk = 0; in ci_apply_state_adjust_rules()
2703 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[count].evclk; in ci_populate_smc_vce_level()
4107 if (table->entries[i].evclk >= min_evclk) in ci_get_vce_boot_level()
4122 if (radeon_current_state->evclk != radeon_new_state->evclk) { in ci_update_vce_dpm()
4123 if (radeon_new_state->evclk) { in ci_update_vce_dpm()
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| D | r600_dpm.c | 1107 rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in r600_parse_extended_power_table()
1122 rdev->pm.dpm.vce_states[i].evclk = in r600_parse_extended_power_table()
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | kv_dpm.c | 990 pi->vce_level[i].Frequency = cpu_to_be32(table->entries[i].evclk); in kv_populate_vce_table()
994 (u8)kv_get_clk_bypass(adev, table->entries[i].evclk); in kv_populate_vce_table()
997 table->entries[i].evclk, false, ÷rs); in kv_populate_vce_table()
1529 static u8 kv_get_vce_boot_level(struct amdgpu_device *adev, u32 evclk) in kv_get_vce_boot_level() argument
1536 if (table->entries[i].evclk >= evclk) in kv_get_vce_boot_level()
1552 if (amdgpu_new_state->evclk > 0 && amdgpu_current_state->evclk == 0) { in kv_update_vce_dpm()
1556 pi->vce_boot_level = kv_get_vce_boot_level(adev, amdgpu_new_state->evclk); in kv_update_vce_dpm()
1572 } else if (amdgpu_new_state->evclk == 0 && amdgpu_current_state->evclk > 0) { in kv_update_vce_dpm()
2221 new_rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in kv_apply_state_adjust_rules()
2224 new_rps->evclk = 0; in kv_apply_state_adjust_rules()
[all …]
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| D | amdgpu_dpm.h | 63 u32 evclk; member
174 u32 evclk; member
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| D | amdgpu_dpm.c | 514 adev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table.entries[i].evclk = in amdgpu_parse_extended_power_table()
530 adev->pm.dpm.vce_states[i].evclk = in amdgpu_parse_extended_power_table()
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| D | si_dpm.c | 3036 u32 evclk, u32 ecclk, u16 *voltage) in si_get_vce_clock_voltage() argument
3043 if (((evclk == 0) && (ecclk == 0)) || in si_get_vce_clock_voltage()
3050 if ((evclk <= table->entries[i].evclk) && in si_get_vce_clock_voltage()
3467 rps->evclk = adev->pm.dpm.vce_states[adev->pm.dpm.vce_level].evclk; in si_apply_state_adjust_rules()
3469 si_get_vce_clock_voltage(adev, rps->evclk, rps->ecclk, in si_apply_state_adjust_rules()
3472 rps->evclk = 0; in si_apply_state_adjust_rules()
7978 *equal &= ((cps->evclk == rps->evclk) && (cps->ecclk == rps->ecclk)); in si_check_state_equal()
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| D | nv.c | 338 static int nv_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in nv_set_vce_clocks() argument
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| D | amdgpu.h | 561 int (*set_vce_clocks)(struct amdgpu_device *adev, u32 evclk, u32 ecclk);
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| D | cik.c | 1347 static int cik_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in cik_set_vce_clocks() argument
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| D | soc15.c | 592 static int soc15_set_vce_clocks(struct amdgpu_device *adev, u32 evclk, u32 ecclk) in soc15_set_vce_clocks() argument
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/inc/ |
| D | power_state.h | 180 unsigned long evclk; member
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| D | hwmgr.h | 104 uint32_t evclk; member
158 uint32_t evclk; member
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | smu10_hwmgr.h | 131 uint32_t evclk; member
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| D | smu8_hwmgr.h | 147 uint32_t evclk; member
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| D | smu7_hwmgr.h | 73 uint32_t evclk; member
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| D | vega10_hwmgr.h | 101 uint32_t evclk; member
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| D | vega20_hwmgr.h | 118 uint32_t evclk; member
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| D | processpptables.c | 1135 vce_table->entries[i].evclk = ((unsigned long)entry->ucEVClkHigh << 16) in get_vce_clock_voltage_limit_table()
1584 …vce_state->evclk = ((uint32_t)vce_clock_info->ucEVClkHigh << 16) | le16_to_cpu(vce_clock_info->usE… in get_vce_state_table_entry()
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| D | process_pptables_v1_0.c | 1259 vce_state->evclk = le32_to_cpu(mm_dep_record->ulEClk); in ppt_get_vce_state_table_entry_v1_0()
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| /Linux-v5.4/drivers/gpu/drm/amd/include/ |
| D | kgd_pp_interface.h | 31 u32 evclk; member
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