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Searched refs:ethsys (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.4/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,ethsys.txt1 Mediatek ethsys controller
4 The Mediatek ethsys controller provides various clocks to the system.
9 - "mediatek,mt2701-ethsys", "syscon"
10 - "mediatek,mt7622-ethsys", "syscon"
11 - "mediatek,mt7623-ethsys", "mediatek,mt2701-ethsys", "syscon"
12 - "mediatek,mt7629-ethsys", "syscon"
16 The ethsys controller uses the common clk binding from
22 ethsys: clock-controller@1b000000 {
23 compatible = "mediatek,mt2701-ethsys", "syscon";
/Linux-v5.4/Documentation/devicetree/bindings/net/
Dmediatek-net.txt29 - resets: Should contain phandles to the ethsys reset signals
33 - mediatek,ethsys: phandle to the syscon node that handles the port setup
60 <&ethsys CLK_ETHSYS_ESW>,
61 <&ethsys CLK_ETHSYS_GP2>,
62 <&ethsys CLK_ETHSYS_GP1>;
68 resets = <&ethsys MT2701_ETHSYS_ETH_RST>;
70 mediatek,ethsys = <&ethsys>;
/Linux-v5.4/drivers/net/ethernet/mediatek/
Dmtk_eth_path.c134 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac1_gmac2_to_sgmii_rgmii()
149 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac1_gmac2_to_sgmii_rgmii()
163 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in set_mux_gmac12_to_gephy_sgmii()
180 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in set_mux_gmac12_to_gephy_sgmii()
Dmtk_eth_soc.c146 regmap_read(eth->ethsys, ETHSYS_SYSCFG, &val); in mt7621_gmac0_rgmii_adjust()
157 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mt7621_gmac0_rgmii_adjust()
172 regmap_update_bits(eth->ethsys, ETHSYS_CLKCFG0, in mtk_gmac0_rgmii_adjust()
280 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
283 regmap_write(eth->ethsys, ETHSYS_SYSCFG0, val); in mtk_mac_config()
294 regmap_read(eth->ethsys, ETHSYS_SYSCFG0, &val); in mtk_mac_config()
296 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
314 regmap_update_bits(eth->ethsys, ETHSYS_SYSCFG0, in mtk_mac_config()
2271 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
2276 regmap_update_bits(eth->ethsys, ETHSYS_RSTCTRL, in ethsys_reset()
[all …]
Dmtk_eth_soc.h862 struct regmap *ethsys; member
/Linux-v5.4/arch/arm/boot/dts/
Dmt7629.dtsi418 ethsys: syscon@1b000000 { label
419 compatible = "mediatek,mt7629-ethsys", "syscon";
433 <&ethsys CLK_ETH_ESW_EN>,
434 <&ethsys CLK_ETH_GP0_EN>,
435 <&ethsys CLK_ETH_GP1_EN>,
436 <&ethsys CLK_ETH_GP2_EN>,
437 <&ethsys CLK_ETH_FE_EN>,
459 mediatek,ethsys = <&ethsys>;
Dmt2701.dtsi674 ethsys: syscon@1b000000 { label
675 compatible = "mediatek,mt2701-ethsys", "syscon";
688 <&ethsys CLK_ETHSYS_ESW>,
689 <&ethsys CLK_ETHSYS_GP1>,
690 <&ethsys CLK_ETHSYS_GP2>,
693 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
694 <&ethsys MT2701_ETHSYS_GMAC_RST>,
695 <&ethsys MT2701_ETHSYS_PPE_RST>;
698 mediatek,ethsys = <&ethsys>;
Dmt7623.dtsi1004 ethsys: syscon@1b000000 { label
1005 compatible = "mediatek,mt7623-ethsys",
1006 "mediatek,mt2701-ethsys",
1017 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
1032 <&ethsys CLK_ETHSYS_ESW>,
1033 <&ethsys CLK_ETHSYS_GP1>,
1034 <&ethsys CLK_ETHSYS_GP2>,
1037 resets = <&ethsys MT2701_ETHSYS_FE_RST>,
1038 <&ethsys MT2701_ETHSYS_GMAC_RST>,
1039 <&ethsys MT2701_ETHSYS_PPE_RST>;
[all …]
Dmt7623a-rfb-emmc.dts138 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
Dmt7623a-rfb-nand.dts142 resets = <&ethsys MT2701_ETHSYS_MCM_RST>;
/Linux-v5.4/arch/arm64/boot/dts/mediatek/
Dmt7622.dtsi880 ethsys: syscon@1b000000 { label
881 compatible = "mediatek,mt7622-ethsys",
892 clocks = <&ethsys CLK_ETH_HSDMA_EN>;
907 <&ethsys CLK_ETH_ESW_EN>,
908 <&ethsys CLK_ETH_GP0_EN>,
909 <&ethsys CLK_ETH_GP1_EN>,
910 <&ethsys CLK_ETH_GP2_EN>,
922 mediatek,ethsys = <&ethsys>;
/Linux-v5.4/drivers/staging/mt7621-dts/
Dmt7621.dtsi390 ethsys: syscon@1e000000 { label
391 compatible = "mediatek,mt7621-ethsys",
413 mediatek,ethsys = <&ethsys>;
/Linux-v5.4/Documentation/devicetree/bindings/crypto/
Dmediatek-crypto.txt22 clocks = <&ethsys CLK_ETHSYS_CRYPTO>;
/Linux-v5.4/Documentation/devicetree/bindings/dma/
Dmtk-hsdma.txt27 clocks = <&ethsys CLK_ETHSYS_HSDMA>;
/Linux-v5.4/drivers/clk/mediatek/
DKconfig47 bool "Clock driver for MediaTek MT2701 ethsys"
50 This driver supports MediaTek MT2701 ethsys clocks.
/Linux-v5.4/Documentation/devicetree/bindings/net/dsa/
Dmt7530.txt28 line index for the ethsys.