Searched refs:enabled_mask (Results 1 – 6 of 6) sorted by relevance
26 volatile unsigned long enabled_mask; member77 clear_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_mask_irq()86 set_bit(irqd->hwirq, &mdp5_mdss->irqcontroller.enabled_mask); in mdss_hw_unmask_irq()128 mdp5_mdss->irqcontroller.enabled_mask = 0; in mdss_irq_domain_init()
21 unsigned long enabled_mask; member106 clear_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_mask()117 set_bit(irqd->hwirq, &dpu_mdss->irq_controller.enabled_mask); in dpu_mdss_irq_unmask()159 dpu_mdss->irq_controller.enabled_mask = 0; in _dpu_mdss_irq_domain_add()
933 u8 enabled_mask = BIT(info->num_pipes) - 1; in intel_device_info_runtime_init() local936 enabled_mask &= ~BIT(PIPE_A); in intel_device_info_runtime_init()938 enabled_mask &= ~BIT(PIPE_B); in intel_device_info_runtime_init()940 enabled_mask &= ~BIT(PIPE_C); in intel_device_info_runtime_init()943 enabled_mask &= ~BIT(PIPE_D); in intel_device_info_runtime_init()950 if (enabled_mask == 0 || !is_power_of_2(enabled_mask + 1)) in intel_device_info_runtime_init()952 enabled_mask); in intel_device_info_runtime_init()954 info->num_pipes = hweight8(enabled_mask); in intel_device_info_runtime_init()
120 unsigned int enabled_mask; member291 chip->enabled_mask = 0; in pcmuio_stop_intr()316 if (!(triggered & chip->enabled_mask)) in pcmuio_handle_intr_subdev()386 chip->enabled_mask = 0; in pcmuio_start_intr()400 chip->enabled_mask = bits; in pcmuio_start_intr()
181 unsigned int enabled_mask; member314 devpriv->enabled_mask = 0; in pcmmio_stop_intr()337 if (!(triggered & devpriv->enabled_mask)) in pcmmio_handle_dio_intr()390 devpriv->enabled_mask = 0; in pcmmio_start_intr()404 devpriv->enabled_mask = bits; in pcmmio_start_intr()
113 u8 enabled_mask = asd_ha->hw_prof.enabled_phys; in ord_phy() local116 for_each_phy(enabled_mask, enabled_mask, i) { in ord_phy()
