Searched refs:dpll_md (Results 1 – 8 of 8) sorted by relevance
93 u32 adpa, dpll_md; in cdv_intel_crt_mode_set() local108 dpll_md = REG_READ(dpll_md_reg); in cdv_intel_crt_mode_set()110 dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK); in cdv_intel_crt_mode_set()
523 .dpll_md = DPLL_A_MD,548 .dpll_md = DPLL_B_MD,
271 u32 dpll_md; member305 u32 dpll_md; member
784 …REG_WRITE(map->dpll_md, (0 << DPLL_MD_UDI_DIVIDER_SHIFT) | ((sdvo_pixel_multiply - 1) << DPLL_MD_U… in cdv_intel_crtc_mode_set()
171 u32 dpll_md; member
1403 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in vlv_enable_pll()1460 I915_WRITE(DPLL_MD(PIPE_B), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()1462 dev_priv->chv_dpll_md[pipe] = pipe_config->dpll_hw_state.dpll_md; in chv_enable_pll()1470 I915_WRITE(DPLL_MD(pipe), pipe_config->dpll_hw_state.dpll_md); in chv_enable_pll()1511 crtc_state->dpll_hw_state.dpll_md); in i9xx_enable_pll()7717 pipe_config->dpll_hw_state.dpll_md = in vlv_compute_dpll()7733 pipe_config->dpll_hw_state.dpll_md = in chv_compute_dpll()8064 u32 dpll_md = (crtc_state->pixel_multiplier - 1) in i9xx_compute_dpll() local8066 crtc_state->dpll_hw_state.dpll_md = dpll_md; in i9xx_compute_dpll()8837 pipe_config->dpll_hw_state.dpll_md = tmp; in i9xx_get_pipe_config()[all …]
489 hw_state->dpll_md, in ibx_dump_hw_state()3652 hw_state->dpll_md, in intel_dpll_dump_hw_state()
2841 pll->state.hw_state.dpll_md); in i915_shared_dplls_info()