Searched refs:div_val (Results 1 – 3 of 3) sorted by relevance
| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-pll14xx.c | 165 u32 tmp, div_val; in clk_pll1416x_set_rate() local
198 div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) | in clk_pll1416x_set_rate()
200 writel_relaxed(div_val, pll->base + 0x4); in clk_pll1416x_set_rate()
231 u32 tmp, div_val; in clk_pll1443x_set_rate() local
242 div_val = readl_relaxed(pll->base + 8); in clk_pll1443x_set_rate()
244 if (!clk_pll1443x_mpk_change(rate, tmp, div_val)) { in clk_pll1443x_set_rate()
261 div_val = (rate->mdiv << MDIV_SHIFT) | (rate->pdiv << PDIV_SHIFT) | in clk_pll1443x_set_rate()
263 writel_relaxed(div_val, pll->base + 0x4); in clk_pll1443x_set_rate()
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| /Linux-v5.4/drivers/clk/mmp/ |
| D | clk-mix.c | 134 static int _set_rate(struct mmp_clk_mix *mix, u32 mux_val, u32 div_val, in _set_rate() argument
159 mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift); in _set_rate()
280 u32 div_val, mux_val; in mmp_clk_mix_set_rate_and_parent() local
283 div_val = _get_div_val(mix, div); in mmp_clk_mix_set_rate_and_parent()
286 return _set_rate(mix, mux_val, div_val, 1, 1); in mmp_clk_mix_set_rate_and_parent()
353 u32 div_val, mux_val; in mmp_clk_set_parent() local
364 div_val = _get_div_val(mix, item->divisor); in mmp_clk_set_parent()
370 div_val = 0; in mmp_clk_set_parent()
373 return _set_rate(mix, mux_val, div_val, 1, div_val ? 1 : 0); in mmp_clk_set_parent()
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| /Linux-v5.4/drivers/media/platform/s5p-cec/ |
| D | exynos_hdmi_cecctrl.c | 25 u32 div_ratio, div_val; in s5p_cec_set_divider() local
42 div_val = CEC_DIV_RATIO * 0.00005 - 1; in s5p_cec_set_divider()
47 writeb(div_val, cec->reg + S5P_CEC_DIVISOR_0); in s5p_cec_set_divider()
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