| /Linux-v5.4/drivers/clk/actions/ |
| D | owl-divider.c | 17 const struct owl_divider_hw *div_hw, in owl_divider_helper_round_rate() argument
22 div_hw->table, div_hw->width, in owl_divider_helper_round_rate()
23 div_hw->div_flags); in owl_divider_helper_round_rate()
31 return owl_divider_helper_round_rate(&div->common, &div->div_hw, in owl_divider_round_rate()
36 const struct owl_divider_hw *div_hw, in owl_divider_helper_recalc_rate() argument
42 regmap_read(common->regmap, div_hw->reg, ®); in owl_divider_helper_recalc_rate()
43 val = reg >> div_hw->shift; in owl_divider_helper_recalc_rate()
44 val &= (1 << div_hw->width) - 1; in owl_divider_helper_recalc_rate()
47 val, div_hw->table, in owl_divider_helper_recalc_rate()
48 div_hw->div_flags, in owl_divider_helper_recalc_rate()
[all …]
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| D | owl-divider.h | 25 struct owl_divider_hw div_hw; member
41 .div_hw = OWL_DIVIDER_HW(_reg, _shift, _width, \
60 const struct owl_divider_hw *div_hw,
65 const struct owl_divider_hw *div_hw,
69 const struct owl_divider_hw *div_hw,
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| D | owl-composite.h | 22 struct owl_divider_hw div_hw; member
42 .rate.div_hw = _div, \
56 .rate.div_hw = _div, \
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| D | owl-composite.c | 61 return owl_divider_helper_round_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_round_rate()
70 return owl_divider_helper_recalc_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_recalc_rate()
79 return owl_divider_helper_set_rate(&comp->common, &comp->rate.div_hw, in owl_comp_div_set_rate()
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| /Linux-v5.4/drivers/clk/tegra/ |
| D | clk-super.c | 122 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_round_rate() local
124 __clk_hw_set_clk(div_hw, hw); in clk_super_round_rate()
126 return super->div_ops->round_rate(div_hw, rate, parent_rate); in clk_super_round_rate()
133 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_recalc_rate() local
135 __clk_hw_set_clk(div_hw, hw); in clk_super_recalc_rate()
137 return super->div_ops->recalc_rate(div_hw, parent_rate); in clk_super_recalc_rate()
144 struct clk_hw *div_hw = &super->frac_div.hw; in clk_super_set_rate() local
146 __clk_hw_set_clk(div_hw, hw); in clk_super_set_rate()
148 return super->div_ops->set_rate(div_hw, rate, parent_rate); in clk_super_set_rate()
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| D | clk-periph.c | 40 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_recalc_rate() local
42 __clk_hw_set_clk(div_hw, hw); in clk_periph_recalc_rate()
44 return div_ops->recalc_rate(div_hw, parent_rate); in clk_periph_recalc_rate()
52 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_round_rate() local
54 __clk_hw_set_clk(div_hw, hw); in clk_periph_round_rate()
56 return div_ops->round_rate(div_hw, rate, prate); in clk_periph_round_rate()
64 struct clk_hw *div_hw = &periph->divider.hw; in clk_periph_set_rate() local
66 __clk_hw_set_clk(div_hw, hw); in clk_periph_set_rate()
68 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
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| /Linux-v5.4/drivers/clk/imx/ |
| D | clk-composite-8m.c | 132 struct clk_hw *div_hw, *gate_hw; in imx8m_clk_composite_flags() local
150 div_hw = &div->hw; in imx8m_clk_composite_flags()
166 mux_hw, &clk_mux_ops, div_hw, in imx8m_clk_composite_flags()
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| /Linux-v5.4/drivers/clk/nxp/ |
| D | clk-lpc18xx-ccu.c | 211 struct clk_hw *div_hw = NULL; in lpc18xx_ccu_register_branch_gate_div() local
223 div_hw = &div->hw; in lpc18xx_ccu_register_branch_gate_div()
232 div_hw, div_ops, in lpc18xx_ccu_register_branch_gate_div()
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| D | clk-lpc32xx.c | 1434 struct clk_hw *mux_hw = NULL, *div_hw = NULL, *gate_hw = NULL; in lpc32xx_clk_register() local
1447 div_hw = &div0->clk.hw; in lpc32xx_clk_register()
1456 mux_hw, mops, div_hw, dops, in lpc32xx_clk_register()
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| /Linux-v5.4/drivers/clk/mediatek/ |
| D | clk-mtk.c | 156 struct clk_hw *mux_hw = NULL, *gate_hw = NULL, *div_hw = NULL; in mtk_clk_register_composite() local
212 div_hw = &div->hw; in mtk_clk_register_composite()
218 div_hw, div_ops, in mtk_clk_register_composite()
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| /Linux-v5.4/drivers/clk/ |
| D | clk-stm32h7.c | 351 struct clk_hw *div_hw; member
368 struct clk_hw *div_hw; in get_cfg_composite_div() local
372 mux_hw = div_hw = gate_hw = NULL; in get_cfg_composite_div()
394 div_hw = &div->hw; in get_cfg_composite_div()
415 composite->div_hw = div_hw; in get_cfg_composite_div()
1327 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1350 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1365 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
1379 c_cfg.div_hw, c_cfg.div_ops, in stm32h7_rcc_init()
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| D | clk-stm32mp1.c | 616 struct clk_hw *mux_hw, *div_hw, *gate_hw; in clk_stm32_register_composite() local
619 div_hw = NULL; in clk_stm32_register_composite()
637 div_hw = _get_stm32_div(base, cfg->div, lock); in clk_stm32_register_composite()
639 if (!IS_ERR(div_hw)) { in clk_stm32_register_composite()
659 mux_hw, mux_ops, div_hw, div_ops, in clk_stm32_register_composite()
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