Searched refs:div3 (Results 1 – 4 of 4) sorted by relevance
118 #define UNIPHIER_CLK_DIV4(parent, div0, div1, div2, div3) \ argument120 UNIPHIER_CLK_DIV2(parent, div2, div3)
1329 u32 div3; in aty128_set_pll() local1346 div3 = aty_ld_pll(PPLL_DIV_3); in aty128_set_pll()1347 div3 &= ~PPLL_FB3_DIV_MASK; in aty128_set_pll()1348 div3 |= pll->feedback_divider; in aty128_set_pll()1349 div3 &= ~PPLL_POST3_DIV_MASK; in aty128_set_pll()1350 div3 |= post_conv[pll->post_divider] << 16; in aty128_set_pll()1354 aty_st_pll(PPLL_DIV_3, div3); in aty128_set_pll()
216 u8 div3; member1004 pll_div3 = da7210_pll_div[cnt].div3; in da7210_set_dai_pll()
189 atmel,master-clk-have-div3-pres;