Searched refs:dimB (Results 1 – 2 of 2) sorted by relevance
103 volatile unsigned long *dimB; in titan_update_irq_hw() local104 dimB = &cchip->dim0.csr; in titan_update_irq_hw()105 if (bcpu == 1) dimB = &cchip->dim1.csr; in titan_update_irq_hw()106 else if (bcpu == 2) dimB = &cchip->dim2.csr; in titan_update_irq_hw()107 else if (bcpu == 3) dimB = &cchip->dim3.csr; in titan_update_irq_hw()109 *dimB = mask | isa_enable; in titan_update_irq_hw()111 *dimB; in titan_update_irq_hw()
88 volatile unsigned long *dimB; in tsunami_update_irq_hw() local89 if (bcpu == 0) dimB = &cchip->dim0.csr; in tsunami_update_irq_hw()90 else if (bcpu == 1) dimB = &cchip->dim1.csr; in tsunami_update_irq_hw()91 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()92 else dimB = &cchip->dim3.csr; in tsunami_update_irq_hw()94 *dimB = mask | isa_enable; in tsunami_update_irq_hw()96 *dimB; in tsunami_update_irq_hw()
