Home
last modified time | relevance | path

Searched refs:dim2 (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.4/drivers/staging/most/dim2/
Dhal.c78 struct dim2_regs __iomem *dim2; /* DIM2 core base address */ member
147 writel(val, &g.dim2->MADR); in dim2_transfer_madr()
150 while ((readl(&g.dim2->MCTL) & 1) != 1) in dim2_transfer_madr()
153 writel(0, &g.dim2->MCTL); /* clear transfer complete */ in dim2_transfer_madr()
163 writel(0, &g.dim2->MCTL); /* clear transfer complete */ in dim2_clear_dbr()
164 writel(0, &g.dim2->MDAT0); in dim2_clear_dbr()
174 return readl((&g.dim2->MDAT0) + mdat_idx); in dim2_read_ctr()
181 writel(0, &g.dim2->MCTL); /* clear transfer complete */ in dim2_write_ctr_mask()
184 writel(value[0], &g.dim2->MDAT0); in dim2_write_ctr_mask()
186 writel(value[1], &g.dim2->MDAT1); in dim2_write_ctr_mask()
[all …]
DMakefile4 most_dim2-objs := dim2.o hal.o sysfs.o
/Linux-v5.4/arch/alpha/kernel/
Dsys_titan.c69 volatile unsigned long *dim0, *dim1, *dim2, *dim3; in titan_update_irq_hw() local
86 dim2 = &cchip->dim2.csr; in titan_update_irq_hw()
90 if (!cpumask_test_cpu(2, &cpm)) dim2 = &dummy; in titan_update_irq_hw()
95 *dim2 = mask2; in titan_update_irq_hw()
100 *dim2; in titan_update_irq_hw()
106 else if (bcpu == 2) dimB = &cchip->dim2.csr; in titan_update_irq_hw()
Dsys_dp264.c55 volatile unsigned long *dim0, *dim1, *dim2, *dim3; in tsunami_update_irq_hw() local
71 dim2 = &cchip->dim2.csr; in tsunami_update_irq_hw()
75 if (!cpu_possible(2)) dim2 = &dummy; in tsunami_update_irq_hw()
80 *dim2 = mask2; in tsunami_update_irq_hw()
85 *dim2; in tsunami_update_irq_hw()
91 else if (bcpu == 2) dimB = &cchip->dim2.csr; in tsunami_update_irq_hw()
/Linux-v5.4/drivers/staging/most/
DMakefile11 obj-$(CONFIG_MOST_DIM2) += dim2/
DKconfig29 source "drivers/staging/most/dim2/Kconfig"
/Linux-v5.4/arch/alpha/include/asm/
Dcore_tsunami.h59 tsunami_64 dim2; member
Dcore_titan.h59 titan_64 dim2; member