Searched refs:dep_mclk_table (Results 1 – 2 of 2) sorted by relevance
762 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table; in smu7_setup_dpm_tables_v1() local768 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_setup_dpm_tables_v1()777 PP_ASSERT_WITH_CODE(dep_mclk_table != NULL, in smu7_setup_dpm_tables_v1()780 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in smu7_setup_dpm_tables_v1()802 for (i = 0; i < dep_mclk_table->count; i++) { in smu7_setup_dpm_tables_v1()805 dep_mclk_table->entries[i].clk) { in smu7_setup_dpm_tables_v1()807 dep_mclk_table->entries[i].clk; in smu7_setup_dpm_tables_v1()815 hwmgr->platform_descriptor.overdriveLimit.memoryClock = dep_mclk_table->entries[i-1].clk; in smu7_setup_dpm_tables_v1()828 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table; in smu7_odn_initial_default_setting() local835 dep_mclk_table = table_info->vdd_dep_on_mclk; in smu7_odn_initial_default_setting()[all …]
1302 struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table = in vega10_setup_default_dpm_tables() local1329 PP_ASSERT_WITH_CODE(dep_mclk_table, in vega10_setup_default_dpm_tables()1332 PP_ASSERT_WITH_CODE(dep_mclk_table->count >= 1, in vega10_setup_default_dpm_tables()1358 dep_mclk_table); in vega10_setup_default_dpm_tables()
