Searched refs:ddr50 (Results 1 – 19 of 19) sorted by relevance
| /Linux-v5.4/Documentation/devicetree/bindings/mmc/ |
| D | sdhci-omap.txt | 13 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
|
| D | brcm,sdhci-brcmstb.txt | 26 sd-uhs-ddr50;
|
| D | sdhci-st.txt | 57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
|
| D | sdhci-cadence.txt | 42 - cdns,phy-input-delay-sd-uhs-ddr50:
|
| /Linux-v5.4/arch/arm/boot/dts/ |
| D | stih410-b2120.dts | 34 sd-uhs-ddr50;
|
| D | dra72-evm.dts | 62 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
|
| D | stih418-b2199.dts | 84 sd-uhs-ddr50;
|
| D | dra72-evm-revc.dts | 97 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
|
| D | dra7-evm.dts | 355 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
|
| D | dra71-evm.dts | 174 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
|
| D | rk3288-firefly-reload.dts | 264 sd-uhs-ddr50;
|
| D | exynos5422-odroid-core.dtsi | 609 sd-uhs-ddr50;
|
| D | exynos5420-arndale-octa.dts | 804 sd-uhs-ddr50;
|
| D | qcom-ipq8064.dtsi | 662 sd-uhs-ddr50;
|
| /Linux-v5.4/include/linux/ |
| D | rtsx_pci.h | 1283 #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ argument
1284 (((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
|
| /Linux-v5.4/arch/arm64/boot/dts/amlogic/ |
| D | meson-gxbb-odroidc2.dts | 262 sd-uhs-ddr50;
|
| D | meson-gxbb-nanopi-k2.dts | 306 sd-uhs-ddr50;
|
| /Linux-v5.4/arch/powerpc/boot/dts/ |
| D | fsp2.dts | 506 sd-uhs-ddr50;
|
| /Linux-v5.4/arch/arm64/boot/dts/zte/ |
| D | zx296718.dtsi | 345 sd-uhs-ddr50;
|
