Searched refs:dclr1 (Results 1 – 2 of 2) sorted by relevance
353 u32 dclr1; /* DRAM Configuration Low DCT1 reg */ member
912 debug_dump_dramcfg_low(pvt, pvt->dclr1, 1); in __dump_misc_regs()1137 pvt->dclr1 = 0; in k8_early_channel_count()1349 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; in k8_dbam_to_chip_select()1516 u32 dclr = dct ? pvt->dclr1 : pvt->dclr0; in f10_dbam_to_chip_select()2830 amd64_read_dct_pci_cfg(pvt, 1, DCLR0, &pvt->dclr1); in read_mc_regs()
