Searched refs:ctrl_pol (Results  1 – 4 of 4) sorted by relevance
| /Linux-v5.4/drivers/gpu/drm/msm/disp/mdp4/ | 
| D | mdp4_dsi_encoder.c | 44 	uint32_t dsi_hsync_skew, vsync_period, vsync_len, ctrl_pol;  in mdp4_dsi_encoder_mode_set()  local 52 	ctrl_pol = 0;  in mdp4_dsi_encoder_mode_set() 54 		ctrl_pol |= MDP4_DSI_CTRL_POLARITY_HSYNC_LOW;  in mdp4_dsi_encoder_mode_set() 56 		ctrl_pol |= MDP4_DSI_CTRL_POLARITY_VSYNC_LOW;  in mdp4_dsi_encoder_mode_set() 80 	mdp4_write(mdp4_kms, REG_MDP4_DSI_CTRL_POLARITY, ctrl_pol);  in mdp4_dsi_encoder_mode_set()
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| D | mdp4_dtv_encoder.c | 90 	uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;  in mdp4_dtv_encoder_mode_set()  local 102 	ctrl_pol = 0;  in mdp4_dtv_encoder_mode_set() 104 		ctrl_pol |= MDP4_DTV_CTRL_POLARITY_HSYNC_LOW;  in mdp4_dtv_encoder_mode_set() 106 		ctrl_pol |= MDP4_DTV_CTRL_POLARITY_VSYNC_LOW;  in mdp4_dtv_encoder_mode_set() 134 	mdp4_write(mdp4_kms, REG_MDP4_DTV_CTRL_POLARITY, ctrl_pol);  in mdp4_dtv_encoder_mode_set()
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| D | mdp4_lcdc_encoder.c | 261 	uint32_t lcdc_hsync_skew, vsync_period, vsync_len, ctrl_pol;  in mdp4_lcdc_encoder_mode_set()  local 273 	ctrl_pol = 0;  in mdp4_lcdc_encoder_mode_set() 275 		ctrl_pol |= MDP4_LCDC_CTRL_POLARITY_HSYNC_LOW;  in mdp4_lcdc_encoder_mode_set() 277 		ctrl_pol |= MDP4_LCDC_CTRL_POLARITY_VSYNC_LOW;  in mdp4_lcdc_encoder_mode_set() 305 	mdp4_write(mdp4_kms, REG_MDP4_LCDC_CTRL_POLARITY, ctrl_pol);  in mdp4_lcdc_encoder_mode_set()
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| /Linux-v5.4/drivers/gpu/drm/msm/disp/mdp5/ | 
| D | mdp5_encoder.c | 102 	uint32_t dtv_hsync_skew, vsync_period, vsync_len, ctrl_pol;  in mdp5_vid_encoder_mode_set()  local 112 	ctrl_pol = 0;  in mdp5_vid_encoder_mode_set() 117 			ctrl_pol |= MDP5_INTF_POLARITY_CTL_HSYNC_LOW;  in mdp5_vid_encoder_mode_set() 119 			ctrl_pol |= MDP5_INTF_POLARITY_CTL_VSYNC_LOW;  in mdp5_vid_encoder_mode_set() 180 	mdp5_write(mdp5_kms, REG_MDP5_INTF_POLARITY_CTL(intf), ctrl_pol);  in mdp5_vid_encoder_mode_set()
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