Searched refs:csels (Results 1 – 2 of 2) sorted by relevance
398 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()399 csmask = pvt->csels[dct].csmasks[csrow]; in get_cs_base_and_mask()410 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()411 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()426 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()427 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()448 for (i = 0; i < pvt->csels[dct].b_cnt; i++)451 pvt->csels[dct].csbases[i]454 for (i = 0; i < pvt->csels[dct].m_cnt; i++)764 u32 dcsm = pvt->csels[chan].csmasks[0]; in debug_dump_dramcfg_low()[all …]
174 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE)175 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE)364 struct chip_select csels[NUM_CONTROLLERS]; member