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Searched refs:controller_id (Results 1 – 25 of 51) sorted by relevance

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/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce120/
Ddce120_hw_sequencer.c77 #define CNTL_ID(controller_id)\ argument
78 controller_id
83 static void dce120_init_pte(struct dc_context *ctx, uint8_t controller_id)
152 uint8_t controller_id, in dce120_enable_display_power_gating() argument
172 if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0) { in dce120_enable_display_power_gating()
175 dcb, controller_id + 1, cntl); in dce120_enable_display_power_gating()
181 HW_REG_CRTC(mmCRTC0_CRTC_MASTER_UPDATE_MODE, controller_id), in dce120_enable_display_power_gating()
186 dce120_init_pte(ctx, controller_id); in dce120_enable_display_power_gating()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/bios/
Dcommand_table.h76 enum controller_id controller_id,
80 enum controller_id controller_id,
90 enum controller_id crtc_id,
Dcommand_table2.h76 enum controller_id controller_id,
80 enum controller_id controller_id,
90 enum controller_id crtc_id,
Dcommand_table2.c266 uint8_t controller_id; in set_pixel_clock_v7() local
273 controller_id, &controller_id)) { in set_pixel_clock_v7()
293 clk.crtc_id = controller_id; in set_pixel_clock_v7()
313 bp_params->target_pixel_clock_100hz, (int)controller_id, in set_pixel_clock_v7()
378 bp_params->controller_id, &atom_controller_id)) in set_crtc_using_dtd_timing_v3()
473 enum controller_id controller_id,
492 enum controller_id controller_id, in enable_crtc_v1() argument
499 if (bp->cmd_helper->controller_id_to_atom(controller_id, &id)) in enable_crtc_v1()
569 enum controller_id crtc_id,
590 enum controller_id crtc_id, in enable_disp_power_gating_v2_1()
Dcommand_table.c984 if (CONTROLLER_ID_D1 != bp_params->controller_id) in set_pixel_clock_v3()
1017 uint8_t controller_id; in set_pixel_clock_v5() local
1024 bp_params->controller_id, &controller_id)) { in set_pixel_clock_v5()
1025 clk.sPCLKInput.ucCRTC = controller_id; in set_pixel_clock_v5()
1074 uint8_t controller_id; in set_pixel_clock_v6() local
1081 bp_params->controller_id, &controller_id)) { in set_pixel_clock_v6()
1101 clk.sPCLKInput.ulCrtcPclkFreq.ucCRTC = controller_id; in set_pixel_clock_v6()
1152 uint8_t controller_id; in set_pixel_clock_v7() local
1158 && bp->cmd_helper->controller_id_to_atom(bp_params->controller_id, &controller_id)) { in set_pixel_clock_v7()
1178 clk.ucCRTC = controller_id; in set_pixel_clock_v7()
[all …]
Dcommand_table_helper2.h38 enum controller_id id,
Dcommand_table_helper.h38 enum controller_id id,
Dcommand_table_helper_struct.h35 bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
Dcommand_table_helper2.c90 enum controller_id id, in dal_cmd_table_helper_controller_id_to_atom2()
Dcommand_table_helper.c68 enum controller_id id, in dal_cmd_table_helper_controller_id_to_atom()
/Linux-v5.4/drivers/gpu/drm/amd/display/include/
Dbios_parser_types.h130 enum controller_id controller_id; member
161 enum controller_id controller_id; member
209 enum controller_id controller_id; /* (Which CRTC uses this PLL) */ member
Dgrph_object_id.h74 enum controller_id { enum
248 static inline enum controller_id dal_graphics_object_id_get_controller_id( in dal_graphics_object_id_get_controller_id()
252 return (enum controller_id) id.id; in dal_graphics_object_id_get_controller_id()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c75 uint8_t controller_id, in dce100_enable_display_power_gating() argument
90 if (!(power_gating == PIPE_GATING_CONTROL_INIT && controller_id != 0)){ in dce100_enable_display_power_gating()
93 dcb, controller_id + 1, cntl); in dce100_enable_display_power_gating()
99 HW_REG_CRTC(mmMASTER_UPDATE_MODE, controller_id), in dce100_enable_display_power_gating()
Ddce100_hw_sequencer.h44 bool dce100_enable_display_power_gating(struct dc *dc, uint8_t controller_id,
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce112/
Ddce112_hw_sequencer.c115 uint8_t controller_id, in dce112_enable_display_power_gating() argument
133 if (power_gating != PIPE_GATING_CONTROL_INIT || controller_id == 0){ in dce112_enable_display_power_gating()
136 dcb, controller_id + 1, cntl); in dce112_enable_display_power_gating()
142 HW_REG_CRTC(mmCRTC_MASTER_UPDATE_MODE, controller_id), in dce112_enable_display_power_gating()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/
Ddce_abm.c58 static bool dce_abm_set_pipe(struct abm *abm, uint32_t controller_id) in dce_abm_set_pipe() argument
75 MASTER_COMM_CMD_REG_BYTE1, controller_id); in dce_abm_set_pipe()
201 uint32_t controller_id) in dmcu_set_backlight_level() argument
213 dce_abm_set_pipe(&abm_dce->base, controller_id); in dmcu_set_backlight_level()
223 if (controller_id == 0) in dmcu_set_backlight_level()
415 unsigned int controller_id, in dce_abm_set_backlight_level_pwm() argument
428 controller_id); in dce_abm_set_backlight_level_pwm()
Ddce_clock_source.c859 bp_pc_params.controller_id = pix_clk_params->controller_id; in dce110_program_pix_clk()
910 unsigned int inst = pix_clk_params->controller_id - CONTROLLER_ID_D0; in dce112_program_pix_clk()
933 bp_pc_params.controller_id = pix_clk_params->controller_id; in dce112_program_pix_clk()
973 bp_pixel_clock_params.controller_id = CONTROLLER_ID_UNDEFINED; in dce110_clock_source_power_down()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/hw/
Dabm.h49 bool (*set_pipe)(struct abm *abm, unsigned int controller_id);
58 unsigned int controller_id,
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/
Ddc_bios_types.h103 enum controller_id id,
126 enum controller_id controller_id,
/Linux-v5.4/drivers/scsi/aic94xx/
Daic94xx_sds.h66 struct controller_id { struct
85 struct controller_id contrl_id; /*PCI id to identify the controller */ argument
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/
Dclock_source.h92 enum controller_id controller_id; member
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce110/
Ddce110_timing_generator.h101 enum controller_id controller_id; member
Ddce110_compressor.c459 unsigned int controller_id_to_index(enum controller_id controller_id) in controller_id_to_index() argument
463 switch (controller_id) { in controller_id_to_index()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/core/
Ddc_surface.c107 uint32_t controller_id) in enable_surface_flip_reporting() argument
109 plane_state->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1; in enable_surface_flip_reporting()
/Linux-v5.4/drivers/gpu/drm/amd/include/
Ddm_pp_interface.h51 uint32_t controller_id; member

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