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Searched refs:config_reg (Results 1 – 25 of 30) sorted by relevance

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/Linux-v5.4/drivers/spi/
Dspi-zynqmp-gqspi.c265 u32 config_reg; in zynqmp_qspi_init_hw() local
287 config_reg = zynqmp_gqspi_read(xqspi, GQSPI_CONFIG_OFST); in zynqmp_qspi_init_hw()
288 config_reg &= ~GQSPI_CFG_MODE_EN_MASK; in zynqmp_qspi_init_hw()
290 config_reg |= GQSPI_CFG_GEN_FIFO_START_MODE_MASK; in zynqmp_qspi_init_hw()
292 config_reg &= ~GQSPI_CFG_ENDIAN_MASK; in zynqmp_qspi_init_hw()
294 config_reg &= ~GQSPI_CFG_EN_POLL_TO_MASK; in zynqmp_qspi_init_hw()
296 config_reg |= GQSPI_CFG_WP_HOLD_MASK; in zynqmp_qspi_init_hw()
298 config_reg &= ~GQSPI_CFG_BAUD_RATE_DIV_MASK; in zynqmp_qspi_init_hw()
300 config_reg &= ~GQSPI_CFG_CLK_PHA_MASK; in zynqmp_qspi_init_hw()
302 config_reg &= ~GQSPI_CFG_CLK_POL_MASK; in zynqmp_qspi_init_hw()
[all …]
Dspi-zynq-qspi.c183 u32 config_reg; in zynq_qspi_init_hw() local
197 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_init_hw()
198 config_reg &= ~(ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
205 config_reg |= (ZYNQ_QSPI_CONFIG_MSTREN_MASK | in zynq_qspi_init_hw()
209 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg); in zynq_qspi_init_hw()
289 u32 config_reg; in zynq_qspi_chipselect() local
291 config_reg = zynq_qspi_read(xqspi, ZYNQ_QSPI_CONFIG_OFFSET); in zynq_qspi_chipselect()
294 config_reg &= ~ZYNQ_QSPI_CONFIG_SSCTRL_MASK; in zynq_qspi_chipselect()
295 config_reg |= (((~(BIT(spi->chip_select))) << in zynq_qspi_chipselect()
299 config_reg |= ZYNQ_QSPI_CONFIG_SSCTRL_MASK; in zynq_qspi_chipselect()
[all …]
/Linux-v5.4/drivers/iio/common/ms_sensors/
Dms_sensors_i2c.c254 u8 *config_reg) in ms_sensors_read_config_reg() argument
264 ret = i2c_master_recv(client, config_reg, 1); in ms_sensors_read_config_reg()
269 dev_dbg(&client->dev, "Config register :%x\n", *config_reg); in ms_sensors_read_config_reg()
288 u8 config_reg; in ms_sensors_write_resolution() local
291 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_write_resolution()
295 config_reg &= 0x7E; in ms_sensors_write_resolution()
296 config_reg |= ((i & 1) << 7) + ((i & 2) >> 1); in ms_sensors_write_resolution()
300 config_reg); in ms_sensors_write_resolution()
319 u8 config_reg; in ms_sensors_show_battery_low() local
322 ret = ms_sensors_read_config_reg(dev_data->client, &config_reg); in ms_sensors_show_battery_low()
[all …]
/Linux-v5.4/drivers/input/misc/
Dmax77693-haptic.c107 unsigned int value, config_reg; in max77693_haptic_configure() local
116 config_reg = MAX77693_HAPTIC_REG_CONFIG2; in max77693_haptic_configure()
122 config_reg = MAX77843_HAP_REG_MCONFIG; in max77693_haptic_configure()
129 config_reg, value); in max77693_haptic_configure()
/Linux-v5.4/drivers/tty/serial/
Dsirfsoc_uart.c700 unsigned long config_reg = 0; in sirfsoc_uart_set_termios() local
717 config_reg |= SIRFUART_DATA_BIT_LEN_8; in sirfsoc_uart_set_termios()
721 config_reg |= SIRFUART_DATA_BIT_LEN_7; in sirfsoc_uart_set_termios()
725 config_reg |= SIRFUART_DATA_BIT_LEN_6; in sirfsoc_uart_set_termios()
729 config_reg |= SIRFUART_DATA_BIT_LEN_5; in sirfsoc_uart_set_termios()
733 config_reg |= SIRFUART_STOP_BIT_LEN_2; in sirfsoc_uart_set_termios()
759 config_reg |= SIRFUART_STICK_BIT_MARK; in sirfsoc_uart_set_termios()
761 config_reg |= SIRFUART_STICK_BIT_SPACE; in sirfsoc_uart_set_termios()
764 config_reg |= SIRFUART_STICK_BIT_ODD; in sirfsoc_uart_set_termios()
766 config_reg |= SIRFUART_STICK_BIT_EVEN; in sirfsoc_uart_set_termios()
[all …]
/Linux-v5.4/drivers/clk/qcom/
Dclk-hfpll.h17 u32 config_reg; member
Dclk-pll.c103 regmap_read(pll->clkr.regmap, pll->config_reg, &config); in clk_pll_recalc_rate()
162 regmap_write(pll->clkr.regmap, pll->config_reg, f->ibits); in clk_pll_set_rate()
242 regmap_update_bits(regmap, pll->config_reg, mask, val); in clk_pll_configure()
Dclk-pll.h43 u32 config_reg; member
Dhfpll.c22 .config_reg = 0x14,
Da53-pll.c63 pll->config_reg = 0x14; in qcom_a53pll_probe()
Dgcc-msm8960.c32 .config_reg = 0x3174,
59 .config_reg = 0x3154,
87 .config_reg = 0x3204,
113 .config_reg = 0x3244,
127 .config_reg = 0x3304,
153 .config_reg = 0x3284,
179 .config_reg = 0x32c4,
205 .config_reg = 0x3304,
219 .config_reg = 0x3404,
244 .config_reg = 0x31d4,
Dgcc-ipq806x.c32 .config_reg = 0x30d4,
59 .config_reg = 0x3174,
86 .config_reg = 0x3154,
114 .config_reg = 0x3204,
140 .config_reg = 0x3244,
166 .config_reg = 0x3304,
191 .config_reg = 0x31d4,
232 .config_reg = 0x31b4,
Dclk-hfpll.c31 regmap_write(regmap, hd->config_reg, hd->config_val); in __clk_hfpll_init_once()
Dgcc-mdm9615.c44 .config_reg = 0x30d4,
82 .config_reg = 0x3154,
109 .config_reg = 0x31d4,
Dlcc-ipq806x.c30 .config_reg = 0x14,
Dmmcc-msm8974.c183 .config_reg = 0x0014,
210 .config_reg = 0x0050,
237 .config_reg = 0x4110,
252 .config_reg = 0x0090,
Dmmcc-apq8084.c218 .config_reg = 0x0014,
245 .config_reg = 0x0050,
272 .config_reg = 0x4110,
287 .config_reg = 0x0090,
303 .config_reg = 0x00b0,
Dlcc-mdm9615.c32 .config_reg = 0x14,
Dlcc-msm8960.c30 .config_reg = 0x14,
Dgcc-msm8916.c263 .config_reg = 0x21014,
290 .config_reg = 0x20014,
317 .config_reg = 0x4a014,
344 .config_reg = 0x23014,
Dgcc-msm8974.c61 .config_reg = 0x0014,
124 .config_reg = 0x0054,
151 .config_reg = 0x1dd4,
Dgcc-apq8084.c105 .config_reg = 0x0014,
168 .config_reg = 0x0054,
195 .config_reg = 0x1dd4,
Dmmcc-msm8960.c112 .config_reg = 0x32c,
128 .config_reg = 0x348,
/Linux-v5.4/drivers/pinctrl/sh-pfc/
Dcore.c248 const struct pinmux_cfg_reg *config_reg = in sh_pfc_get_config_reg() local
250 unsigned int r_width = config_reg->reg_width; in sh_pfc_get_config_reg()
251 unsigned int f_width = config_reg->field_width; in sh_pfc_get_config_reg()
267 curr_width = config_reg->var_field_width[m]; in sh_pfc_get_config_reg()
271 if (config_reg->enum_ids[pos + n] == enum_id) { in sh_pfc_get_config_reg()
272 *crp = config_reg; in sh_pfc_get_config_reg()
/Linux-v5.4/drivers/usb/host/
Dxhci.h187 __le32 config_reg; member
1668 u32 config_reg; member

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