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Searched refs:clock_table (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c465 …populate_bw_params(struct clk_bw_params *bw_params, struct dpm_clocks *clock_table, struct hw_asic… in clk_mgr_helper_populate_bw_params() argument
472 if (clock_table->FClocks[i].Freq == 0) in clk_mgr_helper_populate_bw_params()
475 bw_params->clk_table.entries[i].dcfclk_mhz = clock_table->DcfClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
476 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
477 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
478 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
479 bw_params->clk_table.entries[i].voltage = clock_table->FClocks[i].Vol; in clk_mgr_helper_populate_bw_params()
489 if (clock_table->FClocks[i].Freq == 0) { in clk_mgr_helper_populate_bw_params()
517 struct dpm_clocks clock_table = { 0 }; in rn_clk_mgr_construct() local
567 pp_smu->rn_funcs.get_dpm_clock_table(&pp_smu->rn_funcs.pp_smu, &clock_table); in rn_clk_mgr_construct()
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/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dsmu8_hwmgr.c435 struct SMU8_Fusion_ClkTable *clock_table; in smu8_upload_pptable_to_smu() local
460 clock_table = (struct SMU8_Fusion_ClkTable *)table; in smu8_upload_pptable_to_smu()
477 clock_table->SclkBreakdownTable.ClkLevel[i].GnbVid = in smu8_upload_pptable_to_smu()
479 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
483 clock_table->SclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
486 clock_table->SclkBreakdownTable.ClkLevel[i].DfsDid = in smu8_upload_pptable_to_smu()
490 clock_table->SclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
494 clock_table->AclkBreakdownTable.ClkLevel[i].GfxVid = in smu8_upload_pptable_to_smu()
496 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency = in smu8_upload_pptable_to_smu()
500 clock_table->AclkBreakdownTable.ClkLevel[i].Frequency, in smu8_upload_pptable_to_smu()
[all …]
Dsmu10_hwmgr.c441 DpmClocks_t *table = &(smu10_data->clock_table); in smu10_populate_clock_table()
453 &smu10_data->clock_table.DcefClocks[0]); in smu10_populate_clock_table()
456 &smu10_data->clock_table.SocClocks[0]); in smu10_populate_clock_table()
459 &smu10_data->clock_table.FClocks[0]); in smu10_populate_clock_table()
462 &smu10_data->clock_table.MemClocks[0]); in smu10_populate_clock_table()
583 if (min_mclk < data->clock_table.FClocks[0].Freq) in smu10_dpm_force_dpm_level()
584 min_mclk = data->clock_table.FClocks[0].Freq; in smu10_dpm_force_dpm_level()
Dprocesspptables.c411 struct phm_clock_array *clock_table; in get_valid_clk() local
414 clock_table = kzalloc(table_size, GFP_KERNEL); in get_valid_clk()
415 if (NULL == clock_table) in get_valid_clk()
418 clock_table->count = (unsigned long)table->count; in get_valid_clk()
420 for (i = 0; i < clock_table->count; i++) in get_valid_clk()
421 clock_table->values[i] = (unsigned long)table->entries[i].clk; in get_valid_clk()
423 *ptable = clock_table; in get_valid_clk()
Dsmu10_hwmgr.h296 DpmClocks_t clock_table; member
/Linux-v5.4/drivers/ide/
Dhpt366.c389 u32 *clock_table[NUM_ATA_CLOCKS]; member
425 .clock_table = {
438 .clock_table = {
625 return info->timings->clock_table[info->clock][i]; in get_speed_setting()
1059 if (chip_type >= HPT374 || info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()
1075 if (info->timings->clock_table[clock] == NULL) { in init_chipset_hpt366()
/Linux-v5.4/drivers/tty/serial/8250/
D8250_fintek.c315 static u8 clock_table[] = { F81866_UART_CLK_1_8432MHZ, in fintek_8250_set_termios() local
355 clock_table[i]); in fintek_8250_set_termios()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h289 struct dpm_clocks *clock_table);
/Linux-v5.4/drivers/usb/serial/
Df81232.c76 static u8 const clock_table[] = { F81232_CLK_1_846_MHZ, F81232_CLK_14_77_MHZ, variable
441 F81232_CLK_MASK, clock_table[idx]); in f81232_set_baudrate()
Df81534.c190 static u8 const clock_table[] = { F81534_CLK_1_846_MHZ, F81534_CLK_14_77_MHZ, variable
586 port_priv->shadow_clk |= clock_table[idx]; in f81534_set_port_config()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c1327 struct dpm_clocks *clock_table) in dummy_get_dpm_clock_table() argument
1329 *clock_table = dummy_clocks; in dummy_get_dpm_clock_table()