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Searched refs:clk_table (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.4/drivers/clk/samsung/
Dclk-s5pv210-audss.c70 struct clk_hw **clk_table; in s5pv210_audss_clk_probe() local
88 clk_table = clk_data->hws; in s5pv210_audss_clk_probe()
117 clk_table[CLK_MOUT_AUDSS] = clk_hw_register_mux(NULL, "mout_audss", in s5pv210_audss_clk_probe()
128 clk_table[CLK_MOUT_I2S_A] = clk_hw_register_mux(NULL, "mout_i2s_audss", in s5pv210_audss_clk_probe()
133 clk_table[CLK_DOUT_AUD_BUS] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
136 clk_table[CLK_DOUT_I2S_A] = clk_hw_register_divider(NULL, in s5pv210_audss_clk_probe()
140 clk_table[CLK_I2S] = clk_hw_register_gate(NULL, "i2s_audss", in s5pv210_audss_clk_probe()
146 clk_table[CLK_HCLK_I2S] = clk_hw_register_gate(NULL, "hclk_i2s_audss", in s5pv210_audss_clk_probe()
149 clk_table[CLK_HCLK_UART] = clk_hw_register_gate(NULL, "hclk_uart_audss", in s5pv210_audss_clk_probe()
152 clk_table[CLK_HCLK_HWA] = clk_hw_register_gate(NULL, "hclk_hwa_audss", in s5pv210_audss_clk_probe()
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Dclk-s3c2410-dclk.c243 struct clk_hw **clk_table; in s3c24xx_dclk_probe() local
253 clk_table = s3c24xx_dclk->clk_data.hws; in s3c24xx_dclk_probe()
269 clk_table[MUX_DCLK0] = clk_hw_register_mux(&pdev->dev, "mux_dclk0", in s3c24xx_dclk_probe()
274 clk_table[MUX_DCLK1] = clk_hw_register_mux(&pdev->dev, "mux_dclk1", in s3c24xx_dclk_probe()
280 clk_table[DIV_DCLK0] = clk_hw_register_divider(&pdev->dev, "div_dclk0", in s3c24xx_dclk_probe()
283 clk_table[DIV_DCLK1] = clk_hw_register_divider(&pdev->dev, "div_dclk1", in s3c24xx_dclk_probe()
287 clk_table[GATE_DCLK0] = clk_hw_register_gate(&pdev->dev, "gate_dclk0", in s3c24xx_dclk_probe()
291 clk_table[GATE_DCLK1] = clk_hw_register_gate(&pdev->dev, "gate_dclk1", in s3c24xx_dclk_probe()
296 clk_table[MUX_CLKOUT0] = s3c24xx_register_clkout(&pdev->dev, in s3c24xx_dclk_probe()
299 clk_table[MUX_CLKOUT1] = s3c24xx_register_clkout(&pdev->dev, in s3c24xx_dclk_probe()
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Dclk-exynos-audss.c131 struct clk_hw **clk_table; in exynos_audss_clk_probe() local
155 clk_table = clk_data->hws; in exynos_audss_clk_probe()
186 clk_table[EXYNOS_MOUT_AUDSS] = clk_hw_register_mux(dev, "mout_audss", in exynos_audss_clk_probe()
197 clk_table[EXYNOS_MOUT_I2S] = clk_hw_register_mux(dev, "mout_i2s", in exynos_audss_clk_probe()
202 clk_table[EXYNOS_DOUT_SRP] = clk_hw_register_divider(dev, "dout_srp", in exynos_audss_clk_probe()
206 clk_table[EXYNOS_DOUT_AUD_BUS] = clk_hw_register_divider(dev, in exynos_audss_clk_probe()
210 clk_table[EXYNOS_DOUT_I2S] = clk_hw_register_divider(dev, "dout_i2s", in exynos_audss_clk_probe()
214 clk_table[EXYNOS_SRP_CLK] = clk_hw_register_gate(dev, "srp_clk", in exynos_audss_clk_probe()
218 clk_table[EXYNOS_I2S_BUS] = clk_hw_register_gate(dev, "i2s_bus", in exynos_audss_clk_probe()
222 clk_table[EXYNOS_SCLK_I2S] = clk_hw_register_gate(dev, "sclk_i2s", in exynos_audss_clk_probe()
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/Linux-v5.4/drivers/clk/mmp/
Dclk.c13 struct clk **clk_table; in mmp_clk_init() local
15 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in mmp_clk_init()
16 if (!clk_table) in mmp_clk_init()
19 unit->clk_table = clk_table; in mmp_clk_init()
21 unit->clk_data.clks = clk_table; in mmp_clk_init()
44 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_rate_clks()
66 unit->clk_table[clks[i].id] = clk; in mmp_register_fixed_factor_clks()
92 unit->clk_table[clks[i].id] = clk; in mmp_register_general_gate_clks()
120 unit->clk_table[clks[i].id] = clk; in mmp_register_gate_clks()
148 unit->clk_table[clks[i].id] = clk; in mmp_register_mux_clks()
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Dclk.h139 struct clk **clk_table; member
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega10_processpptables.c575 phm_ppt_v1_clock_voltage_dependency_table *clk_table; in get_socclk_voltage_dependency_table() local
584 clk_table = kzalloc(table_size, GFP_KERNEL); in get_socclk_voltage_dependency_table()
586 if (!clk_table) in get_socclk_voltage_dependency_table()
589 clk_table->count = (uint32_t)clk_dep_table->ucNumEntries; in get_socclk_voltage_dependency_table()
592 clk_table->entries[i].vddInd = in get_socclk_voltage_dependency_table()
594 clk_table->entries[i].clk = in get_socclk_voltage_dependency_table()
598 *pp_vega10_clk_dep_table = clk_table; in get_socclk_voltage_dependency_table()
649 *clk_table; in get_gfxclk_voltage_dependency_table() local
659 clk_table = kzalloc(table_size, GFP_KERNEL); in get_gfxclk_voltage_dependency_table()
661 if (!clk_table) in get_gfxclk_voltage_dependency_table()
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Dprocess_pptables_v1_0.c317 struct phm_clock_array **clk_table, in get_valid_clk() argument
344 *clk_table = table; in get_valid_clk()
/Linux-v5.4/drivers/clk/hisilicon/
Dclk.c31 struct clk **clk_table; in hisi_clk_alloc() local
45 clk_table = devm_kmalloc_array(&pdev->dev, nr_clks, in hisi_clk_alloc()
46 sizeof(*clk_table), in hisi_clk_alloc()
48 if (!clk_table) in hisi_clk_alloc()
51 clk_data->clk_data.clks = clk_table; in hisi_clk_alloc()
62 struct clk **clk_table; in hisi_clk_init() local
76 clk_table = kcalloc(nr_clks, sizeof(*clk_table), GFP_KERNEL); in hisi_clk_init()
77 if (!clk_table) in hisi_clk_init()
80 clk_data->clk_data.clks = clk_table; in hisi_clk_init()
/Linux-v5.4/drivers/clk/axis/
Dclk-artpec6.c20 struct clk *clk_table[ARTPEC6_CLK_NUMCLOCKS]; member
56 clks = clkdata->clk_table; in of_artpec6_clkctrl_setup()
107 clkdata->clk_data.clks = clkdata->clk_table; in of_artpec6_clkctrl_setup()
121 struct clk **clks = clkdata->clk_table; in artpec6_clkctrl_probe()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c343 .clk_table = {
431 …ranges->reader_wm_sets[num_valid_sets].min_fill_clk_mhz = bw_params->clk_table.entries[i - 1].fclk… in build_watermark_ranges()
433 …ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = bw_params->clk_table.entries[i].fclk_mhz; in build_watermark_ranges()
475 bw_params->clk_table.entries[i].dcfclk_mhz = clock_table->DcfClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
476 bw_params->clk_table.entries[i].fclk_mhz = clock_table->FClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
477 bw_params->clk_table.entries[i].memclk_mhz = clock_table->MemClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
478 bw_params->clk_table.entries[i].socclk_mhz = clock_table->SocClocks[i].Freq; in clk_mgr_helper_populate_bw_params()
479 bw_params->clk_table.entries[i].voltage = clock_table->FClocks[i].Vol; in clk_mgr_helper_populate_bw_params()
481 bw_params->clk_table.num_entries = i; in clk_mgr_helper_populate_bw_params()
/Linux-v5.4/drivers/clk/socfpga/
Dclk-s10.c278 struct clk **clk_table; in __socfpga_s10_clk_init() local
294 clk_table = devm_kcalloc(dev, nr_clks, sizeof(*clk_table), GFP_KERNEL); in __socfpga_s10_clk_init()
295 if (!clk_table) in __socfpga_s10_clk_init()
298 clk_data->clk_data.clks = clk_table; in __socfpga_s10_clk_init()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/
Drenoir_ppt.c185 DpmClocks_t *clk_table = smu->smu_table.clocks_table; in renoir_print_clk_levels() local
188 if (!clk_table || clk_type >= SMU_CLK_COUNT) in renoir_print_clk_levels()
241 GET_DPM_CUR_FREQ(clk_table, clk_type, i, value); in renoir_print_clk_levels()
/Linux-v5.4/drivers/acpi/pmic/
Dtps68470_pmic.c168 static const struct tps68470_pmic_table clk_table[] = { variable
330 clk_table, in tps68470_pmic_clk_handler()
331 ARRAY_SIZE(clk_table)); in tps68470_pmic_clk_handler()
/Linux-v5.4/drivers/clk/rockchip/
Dclk.c368 struct clk **clk_table; in rockchip_clk_init() local
375 clk_table = kcalloc(nr_clks, sizeof(struct clk *), GFP_KERNEL); in rockchip_clk_init()
376 if (!clk_table) in rockchip_clk_init()
380 clk_table[i] = ERR_PTR(-ENOENT); in rockchip_clk_init()
383 ctx->clk_data.clks = clk_table; in rockchip_clk_init()
/Linux-v5.4/sound/soc/samsung/
Di2s.c117 struct clk *clk_table[3]; member
808 rclksrc = priv->clk_table[CLK_I2S_RCLK_SRC]; in i2s_hw_params()
1251 if (!IS_ERR(priv->clk_table[i])) in i2s_unregister_clocks()
1252 clk_unregister(priv->clk_table[i]); in i2s_unregister_clocks()
1300 priv->clk_table[CLK_I2S_RCLK_SRC] = clk_register_mux(dev, in i2s_register_clock_provider()
1307 priv->clk_table[CLK_I2S_RCLK_PSR] = clk_register_divider(dev, in i2s_register_clock_provider()
1317 priv->clk_table[CLK_I2S_CDCLK] = clk_register_gate(dev, in i2s_register_clock_provider()
1324 priv->clk_data.clks = priv->clk_table; in i2s_register_clock_provider()
1529 priv->op_clk = clk_get_parent(priv->clk_table[CLK_I2S_RCLK_SRC]); in samsung_i2s_probe()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c1030 vlevel_max = bw_params->clk_table.num_entries - 1; in dcn21_calculate_wm()
1275 struct clk_limit_table *clk_table = &bw_params->clk_table; in update_bw_bounding_box() local
1283 for (i = 0; i < clk_table->num_entries; i++) { in update_bw_bounding_box()
1286 dcn2_1_soc.clock_limits[i].dcfclk_mhz = clk_table->entries[i].dcfclk_mhz; in update_bw_bounding_box()
1287 dcn2_1_soc.clock_limits[i].fabricclk_mhz = clk_table->entries[i].fclk_mhz; in update_bw_bounding_box()
1288 dcn2_1_soc.clock_limits[i].socclk_mhz = clk_table->entries[i].socclk_mhz; in update_bw_bounding_box()
1290 dcn2_1_soc.clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 16 / 1000; in update_bw_bounding_box()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h152 struct clk_limit_table clk_table; member