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Searched refs:clk_s (Results 1 – 11 of 11) sorted by relevance

/Linux-v5.4/drivers/gpu/drm/radeon/
Drv740_dpm.c164 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv740_populate_sclk_value() local
165 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in rv740_populate_sclk_value()
168 cg_spll_spread_spectrum |= CLK_S(clk_s); in rv740_populate_sclk_value()
253 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in rv740_populate_mclk_value() local
255 (dividers.whole_fb_div + (dividers.frac_fb_div / 8)) / (clk_s * 10000); in rv740_populate_mclk_value()
261 mpll_ss2 |= CLKS(clk_s); in rv740_populate_mclk_value()
Drv730_dpm.c96 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_sclk_value() local
97 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv730_populate_sclk_value()
100 cg_spll_spread_spectrum |= CLK_S(clk_s); in rv730_populate_sclk_value()
172 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv730_populate_mclk_value() local
173 u32 clk_v = ss.percentage * dividers.fb_div / (clk_s * 10000); in rv730_populate_mclk_value()
176 mpll_ss |= CLK_S(clk_s); in rv730_populate_mclk_value()
Drv6xx_dpm.c315 u32 index, u32 clk_s) in rv6xx_set_engine_spread_spectrum_clk_s() argument
318 CLKS(clk_s), ~CLKS_MASK); in rv6xx_set_engine_spread_spectrum_clk_s()
340 u32 clk_s) in rv6xx_set_memory_spread_spectrum_clk_s() argument
342 WREG32_P(CG_MPLL_SPREAD_SPECTRUM, CLKS(clk_s), ~CLKS_MASK); in rv6xx_set_memory_spread_spectrum_clk_s()
555 u32 vco_freq, clk_v, clk_s; in rv6xx_program_engine_spread_spectrum() local
572 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, in rv6xx_program_engine_spread_spectrum()
576 rv6xx_set_engine_spread_spectrum_clk_s(rdev, level, clk_s); in rv6xx_program_engine_spread_spectrum()
658 u32 vco_freq = 0, clk_v, clk_s; in rv6xx_program_mclk_spread_spectrum_parameters() local
690 clk_s = rv6xx_calculate_spread_spectrum_clk_s(ss.rate, in rv6xx_program_mclk_spread_spectrum_parameters()
694 rv6xx_set_memory_spread_spectrum_clk_s(rdev, clk_s); in rv6xx_program_mclk_spread_spectrum_parameters()
Dni_dpm.c2046 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ni_calculate_sclk_params() local
2047 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ni_calculate_sclk_params()
2050 cg_spll_spread_spectrum |= CLK_S(clk_s); in ni_calculate_sclk_params()
2098 u32 clk_s; in ni_init_smc_spll_table() local
2118 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in ni_init_smc_spll_table()
2128 if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in ni_init_smc_spll_table()
2131 if (clk_s & ~(SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in ni_init_smc_spll_table()
2145 ((clk_s << SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_NISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in ni_init_smc_spll_table()
2244 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in ni_populate_mclk_value() local
2246 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); in ni_populate_mclk_value()
[all …]
Dcypress_dpm.c562 u32 clk_s = reference_clock * 5 / (decoded_ref * ss.rate); in cypress_populate_mclk_value() local
564 (0x4000 * dividers.whole_fb_div + 0x800 * dividers.frac_fb_div) / (clk_s * 625); in cypress_populate_mclk_value()
570 mpll_ss2 |= CLKS(clk_s); in cypress_populate_mclk_value()
Drv770_dpm.c543 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in rv770_populate_sclk_value() local
544 u32 clk_v = ss.percentage * fbdiv / (clk_s * 10000); in rv770_populate_sclk_value()
547 cg_spll_spread_spectrum |= CLKS(clk_s); in rv770_populate_sclk_value()
Dsi_dpm.c2854 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2874 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in si_init_smc_spll_table()
2885 if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in si_init_smc_spll_table()
2898 ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in si_init_smc_spll_table()
4829 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params() local
4830 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params()
4833 cg_spll_spread_spectrum |= CLK_S(clk_s); in si_calculate_sclk_params()
Dci_dpm.c3193 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in ci_calculate_sclk_params() local
3194 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()
3197 cg_spll_spread_spectrum |= CLK_S(clk_s); in ci_calculate_sclk_params()
/Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/
Dfiji_smumgr.c913 uint32_t clk_s = ref_clock * 5 / in fiji_calculate_sclk_params() local
917 fbdiv / (clk_s * 10000); in fiji_calculate_sclk_params()
920 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); in fiji_calculate_sclk_params()
Dci_smumgr.c345 uint32_t clk_s = ref_clock * 5 / in ci_calculate_sclk_params() local
348 fbdiv / (clk_s * 10000); in ci_calculate_sclk_params()
351 CG_SPLL_SPREAD_SPECTRUM, CLKS, clk_s); in ci_calculate_sclk_params()
/Linux-v5.4/drivers/gpu/drm/amd/amdgpu/
Dsi_dpm.c2953 u32 clk_s, clk_v; in si_init_smc_spll_table() local
2972 clk_s = (sclk_params.vCG_SPLL_SPREAD_SPECTRUM & CLK_S_MASK) >> CLK_S_SHIFT; in si_init_smc_spll_table()
2983 if (clk_s & ~(SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK >> SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT)) in si_init_smc_spll_table()
2996 ((clk_s << SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_SHIFT) & SMC_SISLANDS_SPLL_DIV_TABLE_CLKS_MASK); in si_init_smc_spll_table()
5291 u32 clk_s = reference_clock * 5 / (reference_divider * ss.rate); in si_calculate_sclk_params() local
5292 u32 clk_v = 4 * ss.percentage * fbdiv / (clk_s * 10000); in si_calculate_sclk_params()
5295 cg_spll_spread_spectrum |= CLK_S(clk_s); in si_calculate_sclk_params()