Searched refs:clk_rst (Results 1 – 4 of 4) sorted by relevance
| /Linux-v5.4/arch/arm/mach-mmp/ |
| D | clock-mmp2.c | 51 uint32_t clk_rst; in sdhc_clk_enable() local
53 clk_rst = __raw_readl(clk->clk_rst); in sdhc_clk_enable()
54 clk_rst |= clk->enable_val; in sdhc_clk_enable()
55 __raw_writel(clk_rst, clk->clk_rst); in sdhc_clk_enable()
60 uint32_t clk_rst; in sdhc_clk_disable() local
62 clk_rst = __raw_readl(clk->clk_rst); in sdhc_clk_disable()
63 clk_rst &= ~clk->enable_val; in sdhc_clk_disable()
64 __raw_writel(clk_rst, clk->clk_rst); in sdhc_clk_disable()
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| D | clock.c | 18 uint32_t clk_rst; in apbc_clk_enable() local
20 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel); in apbc_clk_enable()
21 __raw_writel(clk_rst, clk->clk_rst); in apbc_clk_enable()
26 __raw_writel(0, clk->clk_rst); in apbc_clk_disable()
36 __raw_writel(clk->enable_val, clk->clk_rst); in apmu_clk_enable()
41 __raw_writel(0, clk->clk_rst); in apmu_clk_disable()
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| D | clock.h | 15 void __iomem *clk_rst; /* clock reset control register */ member
27 .clk_rst = APBC_##_reg, \
35 .clk_rst = APBC_##_reg, \
43 .clk_rst = APMU_##_reg, \
51 .clk_rst = APMU_##_reg, \
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| D | mmp2.c | 123 unsigned long clk_rst; in mmp2_timer_init() local
131 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1); in mmp2_timer_init()
132 __raw_writel(clk_rst, APBC_TIMERS); in mmp2_timer_init()
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