| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/ |
| D | dcn20_clk_mgr.c | 143 static void request_voltage_and_program_disp_clk(struct clk_mgr *clk_mgr_base, unsigned int khz) in request_voltage_and_program_disp_clk() argument
145 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in request_voltage_and_program_disp_clk()
146 struct dc *dc = clk_mgr_base->ctx->dc; in request_voltage_and_program_disp_clk()
156 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_DISPCLK, clk_mgr_base->clks.dispclk_khz / 1… in request_voltage_and_program_disp_clk()
161 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_DISPCLK, clk_mgr_base->clks.dispclk_khz / 1… in request_voltage_and_program_disp_clk()
164 static void request_voltage_and_program_global_dpp_clk(struct clk_mgr *clk_mgr_base, unsigned int k… in request_voltage_and_program_global_dpp_clk() argument
166 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in request_voltage_and_program_global_dpp_clk()
167 struct dc *dc = clk_mgr_base->ctx->dc; in request_voltage_and_program_global_dpp_clk()
178 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PIXELCLK, clk_mgr_base->clks.dppclk_khz / 1… in request_voltage_and_program_global_dpp_clk()
183 …pp_smu->set_voltage_by_freq(&pp_smu->pp_smu, PP_SMU_NV_PIXELCLK, clk_mgr_base->clks.dppclk_khz / 1… in request_voltage_and_program_global_dpp_clk()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/ |
| D | rv1_clk_mgr.c | 125 static void rv1_update_clocks(struct clk_mgr *clk_mgr_base, in rv1_update_clocks() argument
129 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_update_clocks()
130 struct dc *dc = clk_mgr_base->ctx->dc; in rv1_update_clocks()
159 if (new_clocks->dispclk_khz > clk_mgr_base->clks.dispclk_khz in rv1_update_clocks()
160 || new_clocks->phyclk_khz > clk_mgr_base->clks.phyclk_khz in rv1_update_clocks()
161 || new_clocks->fclk_khz > clk_mgr_base->clks.fclk_khz in rv1_update_clocks()
162 || new_clocks->dcfclk_khz > clk_mgr_base->clks.dcfclk_khz) in rv1_update_clocks()
165 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rv1_update_clocks()
166 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in rv1_update_clocks()
174 if (should_set_clock(safe_to_lower, new_clocks->fclk_khz, clk_mgr_base->clks.fclk_khz)) { in rv1_update_clocks()
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| D | rv1_clk_mgr_clk.c | 52 …egisters(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers() argument
54 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_dump_clk_registers()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/ |
| D | dce120_clk_mgr.c | 84 static void dce12_update_clocks(struct clk_mgr *clk_mgr_base, in dce12_update_clocks() argument
88 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce12_update_clocks()
97 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce12_update_clocks()
107 clk_mgr_base->clks.dispclk_khz = dce112_set_clock(clk_mgr_base, patched_disp_clk); in dce12_update_clocks()
109 dm_pp_apply_clock_for_voltage_request(clk_mgr_base->ctx, &clock_voltage_req); in dce12_update_clocks()
112 if (should_set_clock(safe_to_lower, max_pix_clk, clk_mgr_base->clks.phyclk_khz)) { in dce12_update_clocks()
115 clk_mgr_base->clks.phyclk_khz = max_pix_clk; in dce12_update_clocks()
117 dm_pp_apply_clock_for_voltage_request(clk_mgr_base->ctx, &clock_voltage_req); in dce12_update_clocks()
119 dce11_pplib_apply_display_requirements(clk_mgr_base->ctx->dc, context); in dce12_update_clocks()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/ |
| D | dce112_clk_mgr.c | 70 int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz) in dce112_set_clock() argument
72 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce112_set_clock()
74 struct dc_bios *bp = clk_mgr_base->ctx->dc_bios; in dce112_set_clock()
75 struct dc *core_dc = clk_mgr_base->ctx->dc; in dce112_set_clock()
104 if (!ASICREV_IS_VEGA20_P(clk_mgr_base->ctx->asic_id.hw_internal_rev)) in dce112_set_clock()
193 static void dce112_update_clocks(struct clk_mgr *clk_mgr_base, in dce112_update_clocks() argument
197 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce112_update_clocks()
205 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce112_update_clocks()
209 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce112_update_clocks()
213 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce112_update_clocks()
[all …]
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| D | dce112_clk_mgr.h | 35 int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz);
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/ |
| D | rn_clk_mgr.c | 55 void rn_update_clocks(struct clk_mgr *clk_mgr_base, in rn_update_clocks() argument
59 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks()
61 struct dc *dc = clk_mgr_base->ctx->dc; in rn_update_clocks()
67 struct dmcu *dmcu = clk_mgr_base->ctx->dc->res_pool->dmcu; in rn_update_clocks()
78 if (should_set_clock(safe_to_lower, new_clocks->phyclk_khz, clk_mgr_base->clks.phyclk_khz)) { in rn_update_clocks()
79 clk_mgr_base->clks.phyclk_khz = new_clocks->phyclk_khz; in rn_update_clocks()
80 rn_vbios_smu_set_phyclk(clk_mgr, clk_mgr_base->clks.phyclk_khz); in rn_update_clocks()
83 if (should_set_clock(safe_to_lower, new_clocks->dcfclk_khz, clk_mgr_base->clks.dcfclk_khz)) { in rn_update_clocks()
84 clk_mgr_base->clks.dcfclk_khz = new_clocks->dcfclk_khz; in rn_update_clocks()
85 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
[all …]
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/ |
| D | dce_clk_mgr.c | 129 int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base) in dce_get_dp_ref_freq_khz() argument
131 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_dp_ref_freq_khz()
155 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base) in dce12_get_dp_ref_freq_khz() argument
157 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce12_get_dp_ref_freq_khz()
159 return dce_adjust_dp_ref_freq_for_ss(clk_mgr_dce, clk_mgr_base->dprefclk_khz); in dce12_get_dp_ref_freq_khz()
195 struct clk_mgr *clk_mgr_base, in dce_get_required_clocks_state() argument
198 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_required_clocks_state()
230 struct clk_mgr *clk_mgr_base, in dce_set_clock() argument
233 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_set_clock()
235 struct dc_bios *bp = clk_mgr_base->ctx->dc_bios; in dce_set_clock()
[all …]
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| D | dce_clk_mgr.h | 34 int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base);
36 struct clk_mgr *clk_mgr_base,
51 struct clk_mgr *clk_mgr_base,
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| D | dce110_clk_mgr.c | 248 static void dce11_update_clocks(struct clk_mgr *clk_mgr_base, in dce11_update_clocks() argument
252 struct clk_mgr_internal *clk_mgr_dce = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce11_update_clocks()
260 level_change_req.power_level = dce_get_required_clocks_state(clk_mgr_base, context); in dce11_update_clocks()
264 if (dm_pp_apply_power_level_change_request(clk_mgr_base->ctx, &level_change_req)) in dce11_update_clocks()
268 if (should_set_clock(safe_to_lower, patched_disp_clk, clk_mgr_base->clks.dispclk_khz)) { in dce11_update_clocks()
269 context->bw_ctx.bw.dce.dispclk_khz = dce_set_clock(clk_mgr_base, patched_disp_clk); in dce11_update_clocks()
270 clk_mgr_base->clks.dispclk_khz = patched_disp_clk; in dce11_update_clocks()
272 dce11_pplib_apply_display_requirements(clk_mgr_base->ctx->dc, context); in dce11_update_clocks()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/ |
| D | clk_mgr.c | 146 void dc_destroy_clk_mgr(struct clk_mgr *clk_mgr_base) in dc_destroy_clk_mgr() argument
148 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dc_destroy_clk_mgr()
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