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Searched refs:clk_mgr (Results 1 – 25 of 39) sorted by relevance

12

/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c42 clk_mgr->clk_mgr_shift->field_name, clk_mgr->clk_mgr_mask->field_name
45 (clk_mgr->regs->reg)
102 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr, in dcn20_update_clocks_update_dpp_dto() argument
107 for (i = 0; i < clk_mgr->base.ctx->dc->res_pool->pipe_count; i++) { in dcn20_update_clocks_update_dpp_dto()
115 clk_mgr->dccg->funcs->update_dpp_dto( in dcn20_update_clocks_update_dpp_dto()
116 clk_mgr->dccg, dpp_inst, dppclk_khz, false); in dcn20_update_clocks_update_dpp_dto()
120 static void update_global_dpp_clk(struct clk_mgr_internal *clk_mgr, unsigned int khz) in update_global_dpp_clk() argument
123 * clk_mgr->dentist_vco_freq_khz / khz; in update_global_dpp_clk()
132 static void update_display_clk(struct clk_mgr_internal *clk_mgr, unsigned int khz) in update_display_clk() argument
135 * clk_mgr->dentist_vco_freq_khz / khz; in update_display_clk()
[all …]
Ddcn20_clk_mgr.h29 void dcn2_update_clocks(struct clk_mgr *dccg,
33 void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
36 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
39 void dcn2_init_clocks(struct clk_mgr *clk_mgr);
42 struct clk_mgr_internal *clk_mgr,
48 void dcn2_get_clock(struct clk_mgr *clk_mgr,
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn10/
Drv1_clk_mgr.c37 void rv1_init_clocks(struct clk_mgr *clk_mgr) in rv1_init_clocks() argument
39 memset(&(clk_mgr->clks), 0, sizeof(struct dc_clocks)); in rv1_init_clocks()
42 static int rv1_determine_dppclk_threshold(struct clk_mgr_internal *clk_mgr, struct dc_clocks *new_c… in rv1_determine_dppclk_threshold() argument
45 bool dispclk_increase = new_clocks->dispclk_khz > clk_mgr->base.clks.dispclk_khz; in rv1_determine_dppclk_threshold()
47 bool cur_dpp_div = clk_mgr->base.clks.dispclk_khz > clk_mgr->base.clks.dppclk_khz; in rv1_determine_dppclk_threshold()
77 if (clk_mgr->base.clks.dispclk_khz <= disp_clk_threshold) in rv1_determine_dppclk_threshold()
88 static void ramp_up_dispclk_with_dpp(struct clk_mgr_internal *clk_mgr, struct dc *dc, struct dc_clo… in ramp_up_dispclk_with_dpp() argument
91 int dispclk_to_dpp_threshold = rv1_determine_dppclk_threshold(clk_mgr, new_clocks); in ramp_up_dispclk_with_dpp()
96 clk_mgr->funcs->set_dispclk(clk_mgr, dispclk_to_dpp_threshold); in ramp_up_dispclk_with_dpp()
97 clk_mgr->funcs->set_dprefclk(clk_mgr); in ramp_up_dispclk_with_dpp()
[all …]
Drv1_clk_mgr_vbios_smu.c71 int rv1_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsign… in rv1_vbios_smu_send_msg_with_param() argument
88 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rv1_vbios_smu_set_dispclk() argument
91 struct dc *core_dc = clk_mgr->base.ctx->dc; in rv1_vbios_smu_set_dispclk()
96 clk_mgr, in rv1_vbios_smu_set_dispclk()
105 if (clk_mgr->dfs_bypass_disp_clk != actual_dispclk_set_mhz) in rv1_vbios_smu_set_dispclk()
114 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rv1_vbios_smu_set_dprefclk() argument
119 clk_mgr, in rv1_vbios_smu_set_dprefclk()
121 clk_mgr->base.dprefclk_khz / 1000); in rv1_vbios_smu_set_dprefclk()
Drv2_clk_mgr.c37 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_… in rv2_clk_mgr_construct() argument
40 rv1_clk_mgr_construct(ctx, clk_mgr, pp_smu); in rv2_clk_mgr_construct()
42 clk_mgr->funcs = &rv2_clk_internal_funcs; in rv2_clk_mgr_construct()
Drv1_clk_mgr_vbios_smu.h29 int rv1_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
30 int rv1_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
Drv1_clk_mgr_clk.c52 …egisters(struct clk_state_registers *regs, struct clk_bypass *bypass, struct clk_mgr *clk_mgr_base) in rv1_dump_clk_registers()
54 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rv1_dump_clk_registers() local
Drv1_clk_mgr.h29 void rv1_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_…
Drv2_clk_mgr.h29 void rv2_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr, struct pp_smu_…
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr_vbios_smu.c56 int rn_vbios_smu_send_msg_with_param(struct clk_mgr_internal *clk_mgr, unsigned int msg_id, unsigne… in rn_vbios_smu_send_msg_with_param() argument
73 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_get_smu_version() argument
76 clk_mgr, in rn_vbios_smu_get_smu_version()
82 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz) in rn_vbios_smu_set_dispclk() argument
85 struct dc *core_dc = clk_mgr->base.ctx->dc; in rn_vbios_smu_set_dispclk()
94 clk_mgr, in rn_vbios_smu_set_dispclk()
100 if (clk_mgr->dfs_bypass_disp_clk != actual_dispclk_set_mhz) in rn_vbios_smu_set_dispclk()
109 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr) in rn_vbios_smu_set_dprefclk() argument
114 clk_mgr, in rn_vbios_smu_set_dprefclk()
116 clk_mgr->base.dprefclk_khz / 1000); in rn_vbios_smu_set_dprefclk()
[all …]
Drn_clk_mgr.c55 void rn_update_clocks(struct clk_mgr *clk_mgr_base, in rn_update_clocks()
59 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in rn_update_clocks() local
75 rn_vbios_smu_set_display_count(clk_mgr, display_count); in rn_update_clocks()
80 rn_vbios_smu_set_phyclk(clk_mgr, clk_mgr_base->clks.phyclk_khz); in rn_update_clocks()
85 rn_vbios_smu_set_hard_min_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_khz); in rn_update_clocks()
91 rn_vbios_smu_set_min_deep_sleep_dcfclk(clk_mgr, clk_mgr_base->clks.dcfclk_deep_sleep_khz); in rn_update_clocks()
94 if (should_set_clock(safe_to_lower, new_clocks->dppclk_khz, clk_mgr->base.clks.dppclk_khz)) { in rn_update_clocks()
95 if (clk_mgr->base.clks.dppclk_khz > new_clocks->dppclk_khz) in rn_update_clocks()
103 rn_vbios_smu_set_dispclk(clk_mgr, clk_mgr_base->clks.dispclk_khz); in rn_update_clocks()
110 dcn20_update_clocks_update_dpp_dto(clk_mgr, context); in rn_update_clocks()
[all …]
Drn_clk_mgr_vbios_smu.h29 int rn_vbios_smu_get_smu_version(struct clk_mgr_internal *clk_mgr);
30 int rn_vbios_smu_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
31 int rn_vbios_smu_set_dprefclk(struct clk_mgr_internal *clk_mgr);
32 int rn_vbios_smu_set_hard_min_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_dcfclk_khz);
33 int rn_vbios_smu_set_min_deep_sleep_dcfclk(struct clk_mgr_internal *clk_mgr, int requested_min_ds_d…
34 void rn_vbios_smu_set_phyclk(struct clk_mgr_internal *clk_mgr, int requested_phyclk_khz);
35 int rn_vbios_smu_set_dppclk(struct clk_mgr_internal *clk_mgr, int requested_dpp_khz);
36 void rn_vbios_smu_set_display_count(struct clk_mgr_internal *clk_mgr, int display_count);
37 void rn_vbios_smu_enable_48mhz_tmdp_refclk_pwrdwn(struct clk_mgr_internal *clk_mgr);
38 void rn_vbios_smu_enable_pme_wa(struct clk_mgr_internal *clk_mgr);
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/
Dclk_mgr.c69 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg … in dc_clk_mgr_create()
73 struct clk_mgr_internal *clk_mgr = kzalloc(sizeof(*clk_mgr), GFP_KERNEL); in dc_clk_mgr_create() local
75 if (clk_mgr == NULL) { in dc_clk_mgr_create()
83 dce_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
86 dce110_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
91 dce_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
97 dce112_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
101 dce112_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
107 dce121_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
109 dce120_clk_mgr_construct(ctx, clk_mgr); in dc_clk_mgr_create()
[all …]
DMakefile26 CLK_MGR = clk_mgr.o
28 AMD_DAL_CLK_MGR = $(addprefix $(AMDDALPATH)/dc/clk_mgr/,$(CLK_MGR))
38 AMD_DAL_CLK_MGR_DCE100 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce100/,$(CLK_MGR_DCE100))
47 AMD_DAL_CLK_MGR_DCE110 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce110/,$(CLK_MGR_DCE110))
55 AMD_DAL_CLK_MGR_DCE112 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce112/,$(CLK_MGR_DCE112))
63 AMD_DAL_CLK_MGR_DCE120 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dce120/,$(CLK_MGR_DCE120))
72 AMD_DAL_CLK_MGR_DCN10 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dcn10/,$(CLK_MGR_DCN10))
83 AMD_DAL_CLK_MGR_DCN20 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dcn20/,$(CLK_MGR_DCN20))
94 AMD_DAL_CLK_MGR_DCN21 = $(addprefix $(AMDDALPATH)/dc/clk_mgr/dcn21/,$(CLK_MGR_DCN21))
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce/
Ddce_clk_mgr.c48 clk_mgr->ctx->logger
148 static int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce_get_dp_ref_freq_khz() argument
150 struct dce_clk_mgr *clk_mgr_dce = TO_DCE_CLK_MGR(clk_mgr); in dce_get_dp_ref_freq_khz()
174 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr) in dce12_get_dp_ref_freq_khz() argument
176 struct dce_clk_mgr *clk_mgr_dce = TO_DCE_CLK_MGR(clk_mgr); in dce12_get_dp_ref_freq_khz()
214 struct clk_mgr *clk_mgr, in dce_get_required_clocks_state() argument
217 struct dce_clk_mgr *clk_mgr_dce = TO_DCE_CLK_MGR(clk_mgr); in dce_get_required_clocks_state()
247 struct clk_mgr *clk_mgr, in dce_set_clock() argument
250 struct dce_clk_mgr *clk_mgr_dce = TO_DCE_CLK_MGR(clk_mgr); in dce_set_clock()
252 struct dc_bios *bp = clk_mgr->ctx->dc_bios; in dce_set_clock()
[all …]
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h170 void (*update_clocks)(struct clk_mgr *clk_mgr,
174 int (*get_dp_ref_clk_frequency)(struct clk_mgr *clk_mgr);
176 void (*init_clocks)(struct clk_mgr *clk_mgr);
178 void (*enable_pme_wa) (struct clk_mgr *clk_mgr);
179 void (*get_clock)(struct clk_mgr *clk_mgr,
185 struct clk_mgr { struct
198 struct clk_mgr *dc_clk_mgr_create(struct dc_context *ctx, struct pp_smu_funcs *pp_smu, struct dccg … argument
200 void dc_destroy_clk_mgr(struct clk_mgr *clk_mgr);
Dclk_mgr_internal.h69 #define TO_CLK_MGR_INTERNAL(clk_mgr)\ argument
70 container_of(clk_mgr, struct clk_mgr_internal, base)
73 clk_mgr->base.ctx
75 clk_mgr->ctx->logger
193 struct clk_mgr base;
265 int (*set_dispclk)(struct clk_mgr_internal *clk_mgr, int requested_dispclk_khz);
266 int (*set_dprefclk)(struct clk_mgr_internal *clk_mgr);
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce112/
Ddce112_clk_mgr.c70 int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz) in dce112_set_clock()
125 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz) in dce112_set_dispclk() argument
128 struct dc_bios *bp = clk_mgr->base.ctx->dc_bios; in dce112_set_dispclk()
129 struct dc *core_dc = clk_mgr->base.ctx->dc; in dce112_set_dispclk()
138 clk_mgr->dentist_vco_freq_khz / 62); in dce112_set_dispclk()
152 clk_mgr->cur_min_clks_state = DM_PP_CLOCKS_STATE_NOMINAL; in dce112_set_dispclk()
157 if (clk_mgr->dfs_bypass_disp_clk != actual_clock) in dce112_set_dispclk()
163 clk_mgr->dfs_bypass_disp_clk = actual_clock; in dce112_set_dispclk()
168 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr) in dce112_set_dprefclk() argument
171 struct dc_bios *bp = clk_mgr->base.ctx->dc_bios; in dce112_set_dprefclk()
[all …]
Ddce112_clk_mgr.h32 struct clk_mgr_internal *clk_mgr);
35 int dce112_set_clock(struct clk_mgr *clk_mgr_base, int requested_clk_khz);
36 int dce112_set_dispclk(struct clk_mgr_internal *clk_mgr, int requested_clk_khz);
37 int dce112_set_dprefclk(struct clk_mgr_internal *clk_mgr);
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce100/
Ddce_clk_mgr.c47 (clk_mgr->regs->reg)
51 clk_mgr->clk_mgr_shift->field_name, clk_mgr->clk_mgr_mask->field_name
129 int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base) in dce_get_dp_ref_freq_khz()
131 struct clk_mgr_internal *clk_mgr = TO_CLK_MGR_INTERNAL(clk_mgr_base); in dce_get_dp_ref_freq_khz() local
150 * clk_mgr->dentist_vco_freq_khz) / target_div; in dce_get_dp_ref_freq_khz()
152 return dce_adjust_dp_ref_freq_for_ss(clk_mgr, dp_ref_clk_khz); in dce_get_dp_ref_freq_khz()
155 int dce12_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base) in dce12_get_dp_ref_freq_khz()
195 struct clk_mgr *clk_mgr_base, in dce_get_required_clocks_state()
230 struct clk_mgr *clk_mgr_base, in dce_set_clock()
395 static void dce_update_clocks(struct clk_mgr *clk_mgr_base, in dce_update_clocks()
[all …]
Ddce_clk_mgr.h34 int dce_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base);
36 struct clk_mgr *clk_mgr_base,
48 int dce12_get_dp_ref_freq_khz(struct clk_mgr *dccg);
51 struct clk_mgr *clk_mgr_base,
55 void dce_clk_mgr_destroy(struct clk_mgr **clk_mgr);
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce120/
Ddce120_clk_mgr.c84 static void dce12_update_clocks(struct clk_mgr *clk_mgr_base, in dce12_update_clocks()
128 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce120_clk_mgr_construct() argument
130 dce_clk_mgr_construct(ctx, clk_mgr); in dce120_clk_mgr_construct()
132 memcpy(clk_mgr->max_clks_by_state, in dce120_clk_mgr_construct()
136 clk_mgr->base.dprefclk_khz = 600000; in dce120_clk_mgr_construct()
137 clk_mgr->base.funcs = &dce120_funcs; in dce120_clk_mgr_construct()
140 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr) in dce121_clk_mgr_construct() argument
142 dce120_clk_mgr_construct(ctx, clk_mgr); in dce121_clk_mgr_construct()
143 clk_mgr->base.dprefclk_khz = 625000; in dce121_clk_mgr_construct()
150 dce121_clock_patch_xgmi_ss_info(clk_mgr); in dce121_clk_mgr_construct()
Ddce120_clk_mgr.h29 void dce120_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr);
30 void dce121_clk_mgr_construct(struct dc_context *ctx, struct clk_mgr_internal *clk_mgr);
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/
Ddce110_clk_mgr.c230 pp_display_cfg->disp_clk_khz = dc->clk_mgr->clks.dispclk_khz; in dce11_pplib_apply_display_requirements()
248 static void dce11_update_clocks(struct clk_mgr *clk_mgr_base, in dce11_update_clocks()
282 struct clk_mgr_internal *clk_mgr) in dce110_clk_mgr_construct() argument
284 dce_clk_mgr_construct(ctx, clk_mgr); in dce110_clk_mgr_construct()
286 memcpy(clk_mgr->max_clks_by_state, in dce110_clk_mgr_construct()
290 clk_mgr->regs = &disp_clk_regs; in dce110_clk_mgr_construct()
291 clk_mgr->clk_mgr_shift = &disp_clk_shift; in dce110_clk_mgr_construct()
292 clk_mgr->clk_mgr_mask = &disp_clk_mask; in dce110_clk_mgr_construct()
293 clk_mgr->base.funcs = &dce110_funcs; in dce110_clk_mgr_construct()
/Linux-v5.4/drivers/gpu/drm/amd/display/dc/dce100/
Ddce100_hw_sequencer.c115 dc->clk_mgr->funcs->update_clocks( in dce100_prepare_bandwidth()
116 dc->clk_mgr, in dce100_prepare_bandwidth()
127 dc->clk_mgr->funcs->update_clocks( in dce100_optimize_bandwidth()
128 dc->clk_mgr, in dce100_optimize_bandwidth()

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