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Searched refs:channel_readl (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.4/drivers/dma/
Dat_hdmac_regs.h270 #define channel_readl(atchan, name) \ macro
370 channel_readl(atchan, SADDR), in vdbg_dump_regs()
371 channel_readl(atchan, DADDR), in vdbg_dump_regs()
372 channel_readl(atchan, CTRLA), in vdbg_dump_regs()
373 channel_readl(atchan, CTRLB), in vdbg_dump_regs()
374 channel_readl(atchan, CFG), in vdbg_dump_regs()
375 channel_readl(atchan, DSCR)); in vdbg_dump_regs()
Dat_hdmac.c228 channel_readl(atchan, SADDR), in atc_dostart()
229 channel_readl(atchan, DADDR), in atc_dostart()
230 channel_readl(atchan, CTRLA), in atc_dostart()
231 channel_readl(atchan, CTRLB), in atc_dostart()
232 channel_readl(atchan, DSCR)); in atc_dostart()
376 dscr = channel_readl(atchan, DSCR); in atc_get_bytes_left()
378 ctrla = channel_readl(atchan, CTRLA); in atc_get_bytes_left()
383 new_dscr = channel_readl(atchan, DSCR); in atc_get_bytes_left()
403 ctrla = channel_readl(atchan, CTRLA); in atc_get_bytes_left()
427 ctrla = channel_readl(atchan, CTRLA); in atc_get_bytes_left()
[all …]
Dtxx9dmac.c51 #define channel_readl(dc, name) \ macro
339 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_dostart()
611 csr = channel_readl(dc, CSR); in txx9dmac_chan_tasklet()
629 channel_readl(dc, CSR)); in txx9dmac_chan_interrupt()
656 csr = channel_readl(dc, CSR); in txx9dmac_tasklet()
953 if (!(channel_readl(dc, CSR) & TXX9_DMA_CSR_CHNEN) && in txx9dmac_chain_dynamic()
994 if (channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT) { in txx9dmac_alloc_chan_resources()
1056 BUG_ON(channel_readl(dc, CSR) & TXX9_DMA_CSR_XFACT); in txx9dmac_free_chan_resources()
Didma64.c346 u32 ctlhi = channel_readl(idma64c, CTL_HI); in idma64_active_desc_size()
419 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_deactivate()
428 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_deactivate()
436 cfglo = channel_readl(idma64c, CFG_LO); in idma64_chan_activate()
Dpch_dma.c110 #define channel_readl(pdc, name) \ macro
753 pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR); in pch_dma_save_regs()
754 pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR); in pch_dma_save_regs()
755 pd->ch_regs[i].size = channel_readl(pd_chan, SIZE); in pch_dma_save_regs()
756 pd->ch_regs[i].next = channel_readl(pd_chan, NEXT); in pch_dma_save_regs()
Didma64.h162 #define channel_readl(idma64c, reg) \ macro
/Linux-v5.4/drivers/dma/dw/
Ddw.c34 u32 cfglo = channel_readl(dwc, CFG_LO); in dw_dma_suspend_chan()
41 u32 cfglo = channel_readl(dwc, CFG_LO); in dw_dma_resume_chan()
Didma32.c34 u32 cfglo = channel_readl(dwc, CFG_LO); in idma32_suspend_chan()
44 u32 cfglo = channel_readl(dwc, CFG_LO); in idma32_resume_chan()
Dcore.c139 channel_readl(dwc, SAR), in dwc_dump_chan_regs()
140 channel_readl(dwc, DAR), in dwc_dump_chan_regs()
141 channel_readl(dwc, LLP), in dwc_dump_chan_regs()
142 channel_readl(dwc, CTL_HI), in dwc_dump_chan_regs()
143 channel_readl(dwc, CTL_LO)); in dwc_dump_chan_regs()
299 u32 ctlhi = channel_readl(dwc, CTL_HI); in dwc_get_sent()
300 u32 ctllo = channel_readl(dwc, CTL_LO); in dwc_get_sent()
314 llp = channel_readl(dwc, LLP); in dwc_scan_descriptors()
807 while (!(channel_readl(dwc, CFG_LO) & DWC_CFGL_FIFO_EMPTY) && count--) in dwc_chan_pause()
Dregs.h300 #define channel_readl(dwc, name) \ macro