Home
last modified time | relevance | path

Searched refs:cgu (Results 1 – 25 of 36) sorted by relevance

12

/Linux-v5.4/drivers/clk/ingenic/
Dcgu.c35 ingenic_cgu_gate_get(struct ingenic_cgu *cgu, in ingenic_cgu_gate_get() argument
38 return !!(readl(cgu->base + info->reg) & BIT(info->bit)) in ingenic_cgu_gate_get()
53 ingenic_cgu_gate_set(struct ingenic_cgu *cgu, in ingenic_cgu_gate_set() argument
56 u32 clkgr = readl(cgu->base + info->reg); in ingenic_cgu_gate_set()
63 writel(clkgr, cgu->base + info->reg); in ingenic_cgu_gate_set()
74 struct ingenic_cgu *cgu = ingenic_clk->cgu; in ingenic_pll_recalc_rate() local
82 clk_info = &cgu->clock_info[ingenic_clk->idx]; in ingenic_pll_recalc_rate()
86 spin_lock_irqsave(&cgu->lock, flags); in ingenic_pll_recalc_rate()
87 ctl = readl(cgu->base + pll_info->reg); in ingenic_pll_recalc_rate()
88 spin_unlock_irqrestore(&cgu->lock, flags); in ingenic_pll_recalc_rate()
[all …]
DMakefile2 obj-$(CONFIG_INGENIC_CGU_COMMON) += cgu.o pm.o
3 obj-$(CONFIG_INGENIC_CGU_JZ4740) += jz4740-cgu.o
4 obj-$(CONFIG_INGENIC_CGU_JZ4725B) += jz4725b-cgu.o
5 obj-$(CONFIG_INGENIC_CGU_JZ4770) += jz4770-cgu.o
6 obj-$(CONFIG_INGENIC_CGU_JZ4780) += jz4780-cgu.o
Djz4780-cgu.c91 static struct ingenic_cgu *cgu; variable
107 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_parent()
109 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_parent()
113 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_parent()
115 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_parent()
125 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_recalc_rate()
188 spin_lock_irqsave(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
190 usbpcr1 = readl(cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
193 writel(usbpcr1, cgu->base + CGU_REG_USBPCR1); in jz4780_otg_phy_set_rate()
195 spin_unlock_irqrestore(&cgu->lock, flags); in jz4780_otg_phy_set_rate()
[all …]
Djz4770-cgu.c47 static struct ingenic_cgu *cgu; variable
51 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_enable()
52 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_enable()
61 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_disable()
62 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_disable()
70 void __iomem *reg_opcr = cgu->base + CGU_REG_OPCR; in jz4770_uhc_phy_is_enabled()
71 void __iomem *reg_usbpcr1 = cgu->base + CGU_REG_USBPCR1; in jz4770_uhc_phy_is_enabled()
433 cgu = ingenic_cgu_new(jz4770_cgu_clocks, in jz4770_cgu_init()
435 if (!cgu) in jz4770_cgu_init()
438 retval = ingenic_cgu_register_clocks(cgu); in jz4770_cgu_init()
[all …]
Djz4725b-cgu.c31 static struct ingenic_cgu *cgu; variable
247 cgu = ingenic_cgu_new(jz4725b_cgu_clocks, in jz4725b_cgu_init()
249 if (!cgu) { in jz4725b_cgu_init()
254 retval = ingenic_cgu_register_clocks(cgu); in jz4725b_cgu_init()
258 ingenic_cgu_register_syscore_ops(cgu); in jz4725b_cgu_init()
Djz4740-cgu.c46 static struct ingenic_cgu *cgu; variable
244 cgu = ingenic_cgu_new(jz4740_cgu_clocks, in jz4740_cgu_init()
246 if (!cgu) { in jz4740_cgu_init()
251 retval = ingenic_cgu_register_clocks(cgu); in jz4740_cgu_init()
255 ingenic_cgu_register_syscore_ops(cgu); in jz4740_cgu_init()
Dpm.c39 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu) in ingenic_cgu_register_syscore_ops() argument
42 ingenic_cgu_base = cgu->base; in ingenic_cgu_register_syscore_ops()
Dcgu.h198 struct ingenic_cgu *cgu; member
226 int ingenic_cgu_register_clocks(struct ingenic_cgu *cgu);
Dpm.h10 void ingenic_cgu_register_syscore_ops(struct ingenic_cgu *cgu);
/Linux-v5.4/arch/mips/boot/dts/ingenic/
Djz4740.dtsi2 #include <dt-bindings/clock/jz4740-cgu.h>
38 cgu: jz4740-cgu@10000000 { label
39 compatible = "ingenic,jz4740-cgu";
52 clocks = <&cgu JZ4740_CLK_RTC>;
65 clocks = <&cgu JZ4740_CLK_RTC
66 &cgu JZ4740_CLK_EXT
67 &cgu JZ4740_CLK_PCLK
68 &cgu JZ4740_CLK_TCU>;
85 clocks = <&cgu JZ4740_CLK_RTC>;
166 clocks = <&cgu JZ4740_CLK_AIC>,
[all …]
Djz4770.dtsi3 #include <dt-bindings/clock/jz4770-cgu.h>
39 cgu: jz4770-cgu@10000000 { label
40 compatible = "ingenic,jz4770-cgu";
58 clocks = <&cgu JZ4770_CLK_RTC
59 &cgu JZ4770_CLK_EXT
60 &cgu JZ4770_CLK_PCLK>;
172 clocks = <&ext>, <&cgu JZ4770_CLK_UART0>;
185 clocks = <&ext>, <&cgu JZ4770_CLK_UART1>;
198 clocks = <&ext>, <&cgu JZ4770_CLK_UART2>;
211 clocks = <&ext>, <&cgu JZ4770_CLK_UART3>;
[all …]
Djz4780.dtsi2 #include <dt-bindings/clock/jz4780-cgu.h>
39 cgu: jz4780-cgu@10000000 { label
40 compatible = "ingenic,jz4780-cgu";
60 clocks = <&cgu JZ4780_CLK_RTCLK
61 &cgu JZ4780_CLK_EXCLK
62 &cgu JZ4780_CLK_PCLK>;
79 clocks = <&cgu JZ4780_CLK_RTCLK>;
207 clocks = <&ext>, <&cgu JZ4780_CLK_UART0>;
220 clocks = <&ext>, <&cgu JZ4780_CLK_UART1>;
233 clocks = <&ext>, <&cgu JZ4780_CLK_UART2>;
[all …]
Dgcw0.dts30 clocks = <&cgu JZ4770_CLK_OTG_PHY>;
44 &cgu {
51 <&cgu JZ4770_CLK_PLL1>,
52 <&cgu JZ4770_CLK_UHC>;
55 <&cgu JZ4770_CLK_PLL1>;
/Linux-v5.4/Documentation/devicetree/bindings/clock/
Dlpc1850-ccu.txt47 clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>,
48 <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>,
49 <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK>,
50 <&cgu BASE_USB1_CLK>, <&cgu BASE_SPI_CLK>;
61 clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>,
62 <&cgu BASE_UART2_CLK>, <&cgu BASE_UART1_CLK>,
63 <&cgu BASE_UART0_CLK>, <&cgu BASE_SSP1_CLK>,
64 <&cgu BASE_SSP0_CLK>, <&cgu BASE_SDIO_CLK>;
Dingenic,cgu.txt10 * ingenic,jz4740-cgu
11 * ingenic,jz4725b-cgu
12 * ingenic,jz4770-cgu
13 * ingenic,jz4780-cgu
21 may be found in <dt-bindings/clock/<soctype>-cgu.h>.
26 cgu: jz4740-cgu {
27 compatible = "ingenic,jz4740-cgu";
33 clocks = <&cgu JZ4740_CLK_UART0>;
52 &cgu {
Dlpc1850-cgu.txt23 Should be "nxp,lpc1850-cgu"
116 cgu: clock-controller@40050000 {
117 compatible = "nxp,lpc1850-cgu";
126 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>;
/Linux-v5.4/arch/arm/boot/dts/
Dlpc18xx.dtsi16 #include "dt-bindings/clock/lpc18xx-cgu.h"
165 clocks = <&cgu BASE_LCD_CLK>, <&ccu1 CLK_CPU_LCD>;
232 cgu: clock-controller@40050000 { label
233 compatible = "nxp,lpc1850-cgu";
243 clocks = <&cgu BASE_APB3_CLK>, <&cgu BASE_APB1_CLK>,
244 <&cgu BASE_SPIFI_CLK>, <&cgu BASE_CPU_CLK>,
245 <&cgu BASE_PERIPH_CLK>, <&cgu BASE_USB0_CLK>,
246 <&cgu BASE_USB1_CLK>, <&cgu BASE_SPI_CLK>;
257 clocks = <&cgu BASE_AUDIO_CLK>, <&cgu BASE_UART3_CLK>,
258 <&cgu BASE_UART2_CLK>, <&cgu BASE_UART1_CLK>,
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/sound/
Dingenic,jz4740-i2s.txt17 clocks = <&cgu JZ4740_CLK_AIC>, <&cgu JZ4740_CLK_I2SPLL>;
Dingenic,jz4725b-codec.txt18 clocks = <&cgu JZ4725B_CLK_AIC>;
Dingenic,jz4740-codec.txt18 clocks = <&cgu JZ4740_CLK_AIC>;
/Linux-v5.4/Documentation/devicetree/bindings/serial/
Dlantiq_asc.txt22 clocks = <&cgu CLK_SSX4>, <&cgu GCLK_UART>;
/Linux-v5.4/Documentation/devicetree/bindings/timer/
Dingenic,tcu.txt77 #include <dt-bindings/clock/jz4770-cgu.h>
90 clocks = <&cgu JZ4770_CLK_RTC
91 &cgu JZ4770_CLK_EXT
92 &cgu JZ4770_CLK_PCLK>;
/Linux-v5.4/Documentation/devicetree/bindings/pinctrl/
Dlantiq,pinctrl-xway.txt57 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu
69 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, mdio, gphy
78 spi, asc, cgu, jtag, exin, stp, gpt, mdio, ephy, dfe
89 spi, asc, cgu, jtag, exin, stp, gpt, nmi, pci, ebu, dfe
101 spi, asc, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe
116 spi, usif, cgu, exin, stp, gpt, nmi, pci, ebu, mdio, dfe, gphy
128 spi, usif, cgu, exin, stp, ebu, mdio, dfe, ephy
/Linux-v5.4/arch/mips/boot/dts/lantiq/
Ddanube.dtsi53 cgu0: cgu@103000 {
54 compatible = "lantiq,cgu-xway";
/Linux-v5.4/drivers/clk/nxp/
DMakefile2 obj-$(CONFIG_ARCH_LPC18XX) += clk-lpc18xx-cgu.o

12