| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/smumgr/ |
| D | smu7_smumgr.c | 43 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr); in smu7_set_smc_sram_address() 108 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); in smu7_copy_bytes_to_smc() 144 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data); in smu7_copy_bytes_to_smc() 179 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); in smu7_send_msg_to_smc() 180 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); in smu7_send_msg_to_smc() 196 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); in smu7_send_msg_to_smc_without_waiting() 205 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); in smu7_send_msg_to_smc_with_parameter() 212 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); in smu7_send_msg_to_smc_with_parameter_without_waiting() 219 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000); in smu7_send_msg_to_smc_offset() 221 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test); in smu7_send_msg_to_smc_offset() [all …]
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| D | smu8_smumgr.c | 88 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_ARG_0, parameter); in smu8_send_msg_to_smc_with_parameter() 90 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_RESP_0, 0); in smu8_send_msg_to_smc_with_parameter() 91 cgs_write_register(hwmgr->device, mmSMU_MP1_SRBM2P_MSG_0, msg); in smu8_send_msg_to_smc_with_parameter() 125 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX_0, in smu8_set_smc_sram_address() 141 cgs_write_register(hwmgr->device, mmMP0PUB_IND_DATA_0, value); in smu8_write_smc_sram_dword() 157 cgs_write_register(hwmgr->device, mmMP0PUB_IND_INDEX, index); in smu8_check_fw_load_finish() 197 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, tmp); in smu8_load_mec_firmware() 206 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp); in smu8_load_mec_firmware() 210 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_LO, reg_data); in smu8_load_mec_firmware() 214 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_HI, reg_data); in smu8_load_mec_firmware() [all …]
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| D | ci_smumgr.c | 103 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, smc_addr); in ci_set_smc_sram_address() 134 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_copy_bytes_to_smc() 170 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_copy_bytes_to_smc() 212 cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0); in ci_send_msg_to_smc() 213 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg); in ci_send_msg_to_smc() 228 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter); in ci_send_msg_to_smc_with_parameter() 2331 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in ci_load_smc_ucode() 2336 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in ci_load_smc_ucode() 2687 …cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table() 2688 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in ci_initialize_mc_reg_table() [all …]
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| D | iceland_smumgr.c | 166 cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_0, start_addr); in iceland_upload_smc_firmware_data() 171 cgs_write_register(hwmgr->device, mmSMC_IND_DATA_0, data); in iceland_upload_smc_firmware_data() 2616 …cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table() 2617 …cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table() 2618 …cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, cgs_read_register(hwmgr->device, mmMC_SEQ_… in iceland_initialize_mc_reg_table() 2619 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table() 2620 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table() 2621 …cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, cgs_read_register(hwmgr->device, mmMC_SE… in iceland_initialize_mc_reg_table() 2622 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table() 2623 …cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, cgs_read_register(hwmgr->device, mmMC_S… in iceland_initialize_mc_reg_table() [all …]
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| D | tonga_smumgr.c | 3079 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, in tonga_initialize_mc_reg_table() 3081 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in tonga_initialize_mc_reg_table() 3083 cgs_write_register(hwmgr->device, mmMC_SEQ_DLL_STBY_LP, in tonga_initialize_mc_reg_table() 3085 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD0_LP, in tonga_initialize_mc_reg_table() 3087 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CMD1_LP, in tonga_initialize_mc_reg_table() 3089 cgs_write_register(hwmgr->device, mmMC_SEQ_G5PDX_CTRL_LP, in tonga_initialize_mc_reg_table() 3091 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CMD_LP, in tonga_initialize_mc_reg_table() 3093 cgs_write_register(hwmgr->device, mmMC_SEQ_PMG_DVS_CTL_LP, in tonga_initialize_mc_reg_table() 3095 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING_LP, in tonga_initialize_mc_reg_table() 3097 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, in tonga_initialize_mc_reg_table() [all …]
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| D | fiji_smumgr.c | 140 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000); in fiji_start_smu_in_protection_mode() 141 cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test); in fiji_start_smu_in_protection_mode() 214 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); in fiji_start_avfs_btc() 216 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in fiji_start_avfs_btc() 218 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in fiji_start_avfs_btc() 2524 cgs_write_register(hwmgr->device, mmMC_SEQ_RAS_TIMING_LP, in fiji_initialize_mc_reg_table() 2526 cgs_write_register(hwmgr->device, mmMC_SEQ_CAS_TIMING_LP, in fiji_initialize_mc_reg_table() 2528 cgs_write_register(hwmgr->device, mmMC_SEQ_MISC_TIMING2_LP, in fiji_initialize_mc_reg_table() 2530 cgs_write_register(hwmgr->device, mmMC_SEQ_WR_CTL_D1_LP, in fiji_initialize_mc_reg_table() 2532 cgs_write_register(hwmgr->device, mmMC_SEQ_RD_CTL_D0_LP, in fiji_initialize_mc_reg_table() [all …]
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| D | polaris10_smumgr.c | 110 cgs_write_register(hwmgr->device, mmCP_MEC_CNTL, 0x50000000); in polaris10_perform_btc() 112 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0xffffffff); in polaris10_perform_btc() 113 cgs_write_register(hwmgr->device, mmGRBM_SOFT_RESET, 0); in polaris10_perform_btc()
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_acp.c | 361 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_init() 379 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); in acp_hw_init() 397 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_init() 432 cgs_write_register(adev->acp.cgs_device, mmACP_SOFT_RESET, val); in acp_hw_fini() 449 cgs_write_register(adev->acp.cgs_device, mmACP_CONTROL, val); in acp_hw_fini()
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| /Linux-v5.4/drivers/gpu/drm/amd/include/ |
| D | cgs_common.h | 132 …cgs_write_register(device, mm##reg, (cgs_read_register(device, mm##reg) & ~CGS_REG_FIELD_MASK(reg,… 168 #define cgs_write_register(dev,offset,value) \ macro
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| /Linux-v5.4/drivers/gpu/drm/amd/powerplay/hwmgr/ |
| D | smu7_thermal.c | 154 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_FUZZY); in smu7_fan_ctrl_start_smc_fan_control() 167 cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, FAN_CONTROL_TABLE); in smu7_fan_ctrl_start_smc_fan_control()
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| D | smu_helper.h | 150 cgs_write_register(device, mm##reg, PHM_SET_FIELD( \
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| D | smu_helper.c | 150 cgs_write_register(hwmgr->device, indirect_port, index); in phm_wait_on_indirect_register() 187 cgs_write_register(hwmgr->device, indirect_port, index); in phm_wait_for_indirect_register_unequal()
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| D | vega10_powertune.c | 843 cgs_write_register(hwmgr->device, config_regs->offset, data); in vega10_program_gc_didt_config_registers() 1035 cgs_write_register(hwmgr->device, mmGC_DIDT_CTRL0, data); in vega10_disable_psm_gc_didt_config() 1149 cgs_write_register(hwmgr->device, mmGC_EDC_CTRL, data); in vega10_disable_psm_gc_edc_config()
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| D | smu7_powertune.c | 944 cgs_write_register(hwmgr->device, config_regs->offset, data); in smu7_program_pt_config_registers() 978 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value); in smu7_enable_didt_config() 1005 cgs_write_register(hwmgr->device, mmGRBM_GFX_INDEX, value2); in smu7_enable_didt_config()
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| D | smu7_hwmgr.c | 140 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, 0x9F); in smu7_get_mc_microcode_version() 472 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING, mc_arb_dram_timing); in smu7_copy_and_switch_arb_sets() 473 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2, mc_arb_dram_timing2); in smu7_copy_and_switch_arb_sets() 477 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING_1, mc_arb_dram_timing); in smu7_copy_and_switch_arb_sets() 478 cgs_write_register(hwmgr->device, mmMC_ARB_DRAM_TIMING2_1, mc_arb_dram_timing2); in smu7_copy_and_switch_arb_sets() 487 cgs_write_register(hwmgr->device, mmMC_CG_CONFIG, mc_cg_config); in smu7_copy_and_switch_arb_sets() 1162 cgs_write_register(hwmgr->device, 0x1488, in smu7_start_dpm() 4248 cgs_write_register(hwmgr->device, mmMC_SEQ_IO_DEBUG_INDEX, in smu7_check_mc_firmware()
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| /Linux-v5.4/drivers/gpu/drm/amd/display/dc/ |
| D | dm_services.h | 82 cgs_write_register(ctx->cgs_device, address, value); in dm_write_reg_func()
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