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Searched refs:cascade (Results 1 – 25 of 44) sorted by relevance

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/Linux-v5.4/arch/powerpc/platforms/cell/
Dinterrupt.c97 int cascade; in iic_ioexc_cascade() local
108 for (cascade = 63; cascade >= 0; cascade--) in iic_ioexc_cascade()
109 if (bits & (0x8000000000000000UL >> cascade)) { in iic_ioexc_cascade()
112 base | cascade); in iic_ioexc_cascade()
301 unsigned int node, cascade, found = 0; in setup_iic() local
332 cascade = node << IIC_IRQ_NODE_SHIFT; in setup_iic()
333 cascade |= 1 << IIC_IRQ_CLASS_SHIFT; in setup_iic()
334 cascade |= IIC_UNIT_IIC; in setup_iic()
335 cascade = irq_create_mapping(iic_host, cascade); in setup_iic()
336 if (!cascade) in setup_iic()
[all …]
/Linux-v5.4/drivers/mtd/devices/
Ddocg3.c94 u8 val = readb(docg3->cascade->base + reg); in doc_readb()
102 u16 val = readw(docg3->cascade->base + reg); in doc_readw()
110 writeb(val, docg3->cascade->base + reg); in doc_writeb()
116 writew(val, docg3->cascade->base + reg); in doc_writew()
650 numerrs = decode_bch(docg3->cascade->bch, NULL, in doc_ecc_bch_fix_data()
897 mutex_lock(&docg3->cascade->lock); in doc_read_oob()
969 mutex_unlock(&docg3->cascade->lock); in doc_read_oob()
1191 mutex_lock(&docg3->cascade->lock); in doc_erase()
1199 mutex_unlock(&docg3->cascade->lock); in doc_erase()
1428 mutex_lock(&docg3->cascade->lock); in doc_write_oob()
[all …]
Ddocg3.h291 struct docg3_cascade *cascade; member
/Linux-v5.4/Documentation/devicetree/bindings/gpio/
Dgpio-stp-xway.txt6 to drive the 2 LSBs of the cascade automatically.
19 shift register cascade.
21 in the shift register cascade.
22 - lantiq,dsl : The dsl core can control the 2 LSBs of the gpio cascade. This 2 bit
24 - lantiq,phy1 : The gphy1 core can control 3 bits of the gpio cascade.
25 - lantiq,phy2 : The gphy2 core can control 3 bits of the gpio cascade.
Dgpio-mm-lantiq.txt20 shift register cascade.
/Linux-v5.4/arch/mips/cobalt/
Dirq.c48 static struct irqaction cascade = { variable
60 setup_irq(GT641XX_CASCADE_IRQ, &cascade); in arch_init_irq()
61 setup_irq(I8259_CASCADE_IRQ, &cascade); in arch_init_irq()
/Linux-v5.4/arch/mips/vr41xx/common/
Dirq.c51 irq_cascade_t *cascade; in irq_dispatch() local
58 cascade = irq_cascade + irq; in irq_dispatch()
59 if (cascade->get_irq != NULL) { in irq_dispatch()
71 ret = cascade->get_irq(irq); in irq_dispatch()
/Linux-v5.4/arch/c6x/platforms/
Dmegamod-pic.c95 struct megamod_cascade_data *cascade; in megamod_irq_cascade() local
101 cascade = irq_desc_get_handler_data(desc); in megamod_irq_cascade()
103 pic = cascade->pic; in megamod_irq_cascade()
104 idx = cascade->index; in megamod_irq_cascade()
/Linux-v5.4/arch/mips/lasat/
Dinterrupt.c93 static struct irqaction cascade = { variable
122 setup_irq(LASAT_CASCADE_IRQ, &cascade); in arch_init_irq()
/Linux-v5.4/Documentation/devicetree/bindings/mips/
Dcpu_irq.txt7 platforms internal interrupt controller cascade.
9 Below is an example of a platform describing the cascade inside the devicetree
/Linux-v5.4/arch/alpha/kernel/
Dirq_i8259.c85 static struct irqaction cascade = { in init_i8259a_irqs() local
99 setup_irq(2, &cascade); in init_i8259a_irqs()
/Linux-v5.4/Documentation/arm/
Dnetwinder.rst55 2 ISA cascade
79 2 ISA cascade
/Linux-v5.4/arch/powerpc/boot/dts/
Dklondike.dts65 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
77 interrupts = <0x0a 0x4 0x0b 0x4>; /* cascade */
89 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Darches.dts76 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
88 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
100 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Dbluestone.dts67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Dtaishan.dts73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
Deiger.dts71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Dredwood.dts67 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
79 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
91 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Dhaleakala.dts68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
80 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
Dicon.dts70 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
82 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
94 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
Diss4xx.dts71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
/Linux-v5.4/arch/powerpc/platforms/pseries/
Dsetup.c175 unsigned int cascade; in pseries_setup_i8259_cascade() local
192 cascade = irq_of_parse_and_map(found, 0); in pseries_setup_i8259_cascade()
193 if (!cascade) { in pseries_setup_i8259_cascade()
197 pr_debug("pic: cascade mapped to irq %d\n", cascade); in pseries_setup_i8259_cascade()
218 irq_set_chained_handler(cascade, pseries_8259_cascade); in pseries_setup_i8259_cascade()
/Linux-v5.4/Documentation/devicetree/bindings/interrupt-controller/
Dgoogle,goldfish-pic.txt12 Example for mips when used in cascade mode:
/Linux-v5.4/Documentation/devicetree/bindings/timer/
Drenesas,tpu.txt5 This implementation support only cascade mode.
Drenesas,8bit-timer.txt6 This implement only supported cascade mode.

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