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Searched refs:cacheline_size (Results 1 – 13 of 13) sorted by relevance

/Linux-v5.4/tools/perf/util/
Dcacheline.h7 int __pure cacheline_size(void);
12 return (address & ~(cacheline_size() - 1)); in cl_address()
18 return (address & (cacheline_size() - 1)); in cl_offset()
Dcacheline.c17 int cacheline_size(void) in cacheline_size() function
Dsort.c2652 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add()
2698 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
/Linux-v5.4/drivers/gpu/drm/amd/amdkfd/
Dkfd_topology.h120 uint32_t cacheline_size; member
Dkfd_crat.c320 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
Dkfd_topology.c341 sysfs_show_32bit_prop(buffer, "cache_line_size", cache->cacheline_size); in kfd_cache_show()
/Linux-v5.4/drivers/scsi/
Dmyrb.h297 unsigned short cacheline_size; /* Bytes 104-105 */ member
Dmyrs.h413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
Dmyrs.c1575 if (ldev_info->cacheline_size) { in myrs_mode_sense()
1577 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
/Linux-v5.4/drivers/pci/
Dpci.c4194 u8 cacheline_size; in pci_set_cacheline_size() local
4201 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4202 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size()
4203 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size()
4209 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size()
4210 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
/Linux-v5.4/drivers/gpu/drm/i915/
Dintel_pm.c586 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
593 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
600 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
607 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE,
614 .cacheline_size = I915_FIFO_LINE_SIZE,
621 .cacheline_size = I915_FIFO_LINE_SIZE,
628 .cacheline_size = I915_FIFO_LINE_SIZE,
635 .cacheline_size = I830_FIFO_LINE_SIZE,
642 .cacheline_size = I830_FIFO_LINE_SIZE,
649 .cacheline_size = I830_FIFO_LINE_SIZE,
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/Linux-v5.4/drivers/gpu/drm/i915/display/
Dintel_display_types.h1072 u8 cacheline_size; member
/Linux-v5.4/drivers/net/ethernet/broadcom/
Dtg3.c17063 int cacheline_size; in tg3_calc_dma_bndry() local
17069 cacheline_size = 1024; in tg3_calc_dma_bndry()
17071 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry()
17111 switch (cacheline_size) { in tg3_calc_dma_bndry()
17136 switch (cacheline_size) { in tg3_calc_dma_bndry()
17153 switch (cacheline_size) { in tg3_calc_dma_bndry()