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Searched refs:cache_line_size (Results 1 – 25 of 59) sorted by relevance

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/Linux-v5.4/arch/mips/mm/
Dpage.c101 static int cache_line_size; variable
102 #define cache_line_mask() (cache_line_size - 1)
148 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
217 cache_line_size = cpu_scache_line_size(); in set_prefetch_parameters()
219 cache_line_size = cpu_dcache_line_size(); in set_prefetch_parameters()
226 max(cache_line_size >> 1, in set_prefetch_parameters()
229 max(cache_line_size >> 1, in set_prefetch_parameters()
250 } else if (cache_line_size == (half_clear_loop_size << 1)) { in build_clear_pref()
309 off = cache_line_size ? min(8, pref_bias_clear_store / cache_line_size) in build_clear_page()
310 * cache_line_size : 0; in build_clear_page()
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/Linux-v5.4/tools/perf/util/
Dcacheline.c6 #define cache_line_size(cacheline_sizep) *cacheline_sizep = sysconf(_SC_LEVEL1_DCACHE_LINESIZE) macro
10 static void cache_line_size(int *cacheline_sizep) in cache_line_size() function
22 cache_line_size(&size); in cacheline_size()
/Linux-v5.4/arch/arm64/kernel/
Dcacheinfo.c20 int cache_line_size(void) in cache_line_size() function
27 EXPORT_SYMBOL_GPL(cache_line_size);
/Linux-v5.4/drivers/net/ethernet/mellanox/mlx5/core/
Dalloc.c183 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_alloc_db_pgdir()
212 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_alloc_db_from_pgdir()
224 offset = db->index * cache_line_size(); in mlx5_alloc_db_from_pgdir()
271 u32 db_per_page = PAGE_SIZE / cache_line_size(); in mlx5_db_free()
/Linux-v5.4/drivers/s390/cio/
Dairq.c145 if ((cache_line_size() * BITS_PER_BYTE) < bits in airq_iv_create()
310 cache_line_size(), in airq_init()
311 cache_line_size(), PAGE_SIZE); in airq_init()
/Linux-v5.4/drivers/infiniband/sw/rxe/
Drxe_queue.c101 if (elem_size < cache_line_size()) in rxe_queue_init()
102 elem_size = cache_line_size(); in rxe_queue_init()
/Linux-v5.4/include/linux/
Dcache.h79 #define cache_line_size() L1_CACHE_BYTES macro
Dpci-epf.h47 u8 cache_line_size; member
/Linux-v5.4/Documentation/PCI/endpoint/function/binding/
Dpci-test.txt12 cache_line_size : don't care
/Linux-v5.4/arch/arc/include/asm/
Dcache.h49 #define cache_line_size() SMP_CACHE_BYTES macro
/Linux-v5.4/arch/arm64/include/asm/
Dcache.h90 int cache_line_size(void);
/Linux-v5.4/drivers/scsi/cxlflash/
Dcommon.h173 } __aligned(cache_line_size());
228 } __aligned(cache_line_size());
Dsislite.h480 char carea[cache_line_size()]; /* 128B each */
/Linux-v5.4/Documentation/PCI/endpoint/
Dpci-endpoint-cfs.rst67 ... cache_line_size
112 | cache_line_size
/Linux-v5.4/drivers/pci/endpoint/
Dpci-ep-cfs.c329 PCI_EPF_HEADER_R(cache_line_size)
330 PCI_EPF_HEADER_W_u8(cache_line_size)
347 CONFIGFS_ATTR(pci_epf_, cache_line_size);
/Linux-v5.4/drivers/staging/vc04_services/interface/vchiq_arm/
Dvchiq_arm.h99 const unsigned int cache_line_size; member
/Linux-v5.4/drivers/pci/
Dpci-bridge-emul.h14 u8 cache_line_size; member
Dpci-acpi.c123 u8 cache_line_size; /* Not applicable to PCIe */ member
131 .cache_line_size = 8,
150 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, hpx->cache_line_size); in program_hpx_type0()
185 hpx0->cache_line_size = fields[2].integer.value; in decode_type0_hpx_record()
729 hpx0.cache_line_size = fields[0].integer.value; in acpi_run_hpp()
Dpci-bridge-emul.c275 bridge->conf.cache_line_size = 0x10; in pci_bridge_emul_init()
/Linux-v5.4/tools/virtio/ringtest/
Dptr_ring.c14 #define cache_line_size() SMP_CACHE_BYTES macro
/Linux-v5.4/drivers/gpu/drm/amd/amdkfd/
Dkfd_crat.h166 uint16_t cache_line_size; member
/Linux-v5.4/arch/powerpc/kernel/
Deeh_pe.c53 alloc_size = ALIGN(alloc_size, cache_line_size()); in eeh_pe_alloc()
68 cache_line_size()); in eeh_pe_alloc()
/Linux-v5.4/include/uapi/rdma/
Dmlx5-abi.h131 __u32 cache_line_size; member
/Linux-v5.4/block/
Dblk-flush.c486 rq_sz = round_up(rq_sz + cmd_size, cache_line_size()); in blk_alloc_flush_queue()
/Linux-v5.4/drivers/edac/
Di7core_edac.c1983 const int cache_line_size = 64; in set_sdram_scrub_rate() local
1991 cache_line_size * 1000000; in set_sdram_scrub_rate()
2023 const u32 cache_line_size = 64; in get_sdram_scrub_rate() local
2043 1000000 * cache_line_size; in get_sdram_scrub_rate()

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